package cuda

/*
 THIS FILE IS AUTO-GENERATED BY CUDA2GO.
 EDITING IS FUTILE.
*/

import (
	"github.com/mumax/3/cuda/cu"
	"github.com/mumax/3/timer"
	"sync"
	"unsafe"
)

// CUDA handle for setvectorpotential kernel
var setvectorpotential_code cu.Function

// Stores the arguments for setvectorpotential kernel invocation
type setvectorpotential_args_t struct {
	arg_Ax  unsafe.Pointer
	arg_Ay  unsafe.Pointer
	arg_Az  unsafe.Pointer
	arg_Fx  unsafe.Pointer
	arg_Fy  unsafe.Pointer
	arg_Fz  unsafe.Pointer
	arg_cy  float32
	arg_Nx  int
	arg_Ny  int
	arg_Nz  int
	arg_PBC byte
	argptr  [11]unsafe.Pointer
	sync.Mutex
}

// Stores the arguments for setvectorpotential kernel invocation
var setvectorpotential_args setvectorpotential_args_t

func init() {
	// CUDA driver kernel call wants pointers to arguments, set them up once.
	setvectorpotential_args.argptr[0] = unsafe.Pointer(&setvectorpotential_args.arg_Ax)
	setvectorpotential_args.argptr[1] = unsafe.Pointer(&setvectorpotential_args.arg_Ay)
	setvectorpotential_args.argptr[2] = unsafe.Pointer(&setvectorpotential_args.arg_Az)
	setvectorpotential_args.argptr[3] = unsafe.Pointer(&setvectorpotential_args.arg_Fx)
	setvectorpotential_args.argptr[4] = unsafe.Pointer(&setvectorpotential_args.arg_Fy)
	setvectorpotential_args.argptr[5] = unsafe.Pointer(&setvectorpotential_args.arg_Fz)
	setvectorpotential_args.argptr[6] = unsafe.Pointer(&setvectorpotential_args.arg_cy)
	setvectorpotential_args.argptr[7] = unsafe.Pointer(&setvectorpotential_args.arg_Nx)
	setvectorpotential_args.argptr[8] = unsafe.Pointer(&setvectorpotential_args.arg_Ny)
	setvectorpotential_args.argptr[9] = unsafe.Pointer(&setvectorpotential_args.arg_Nz)
	setvectorpotential_args.argptr[10] = unsafe.Pointer(&setvectorpotential_args.arg_PBC)
}

// Wrapper for setvectorpotential CUDA kernel, asynchronous.
func k_setvectorpotential_async(Ax unsafe.Pointer, Ay unsafe.Pointer, Az unsafe.Pointer, Fx unsafe.Pointer, Fy unsafe.Pointer, Fz unsafe.Pointer, cy float32, Nx int, Ny int, Nz int, PBC byte, cfg *config) {
	if Synchronous { // debug
		Sync()
		timer.Start("setvectorpotential")
	}

	setvectorpotential_args.Lock()
	defer setvectorpotential_args.Unlock()

	if setvectorpotential_code == 0 {
		setvectorpotential_code = fatbinLoad(setvectorpotential_map, "setvectorpotential")
	}

	setvectorpotential_args.arg_Ax = Ax
	setvectorpotential_args.arg_Ay = Ay
	setvectorpotential_args.arg_Az = Az
	setvectorpotential_args.arg_Fx = Fx
	setvectorpotential_args.arg_Fy = Fy
	setvectorpotential_args.arg_Fz = Fz
	setvectorpotential_args.arg_cy = cy
	setvectorpotential_args.arg_Nx = Nx
	setvectorpotential_args.arg_Ny = Ny
	setvectorpotential_args.arg_Nz = Nz
	setvectorpotential_args.arg_PBC = PBC

	args := setvectorpotential_args.argptr[:]
	cu.LaunchKernel(setvectorpotential_code, cfg.Grid.X, cfg.Grid.Y, cfg.Grid.Z, cfg.Block.X, cfg.Block.Y, cfg.Block.Z, 0, stream0, args)

	if Synchronous { // debug
		Sync()
		timer.Stop("setvectorpotential")
	}
}

// maps compute capability on PTX code for setvectorpotential kernel.
var setvectorpotential_map = map[int]string{0: "",
	50: setvectorpotential_ptx_50,
	52: setvectorpotential_ptx_52,
	53: setvectorpotential_ptx_53,
	60: setvectorpotential_ptx_60,
	61: setvectorpotential_ptx_61,
	62: setvectorpotential_ptx_62,
	70: setvectorpotential_ptx_70,
	72: setvectorpotential_ptx_72,
	75: setvectorpotential_ptx_75,
	80: setvectorpotential_ptx_80,
	86: setvectorpotential_ptx_86,
	87: setvectorpotential_ptx_87,
	89: setvectorpotential_ptx_89,
	90: setvectorpotential_ptx_90}

// setvectorpotential PTX code for various compute capabilities.
const (
	setvectorpotential_ptx_50 = `
.version 8.5
.target sm_50
.address_size 64

	// .globl	setvectorpotential

.visible .entry setvectorpotential(
	.param .u64 setvectorpotential_param_0,
	.param .u64 setvectorpotential_param_1,
	.param .u64 setvectorpotential_param_2,
	.param .u64 setvectorpotential_param_3,
	.param .u64 setvectorpotential_param_4,
	.param .u64 setvectorpotential_param_5,
	.param .f32 setvectorpotential_param_6,
	.param .u32 setvectorpotential_param_7,
	.param .u32 setvectorpotential_param_8,
	.param .u32 setvectorpotential_param_9,
	.param .u8 setvectorpotential_param_10
)
{
	.reg .pred 	%p<11>;
	.reg .f32 	%f<54>;
	.reg .b32 	%r<48>;
	.reg .b64 	%rd<43>;


	ld.param.u64 	%rd18, [setvectorpotential_param_0];
	ld.param.u64 	%rd19, [setvectorpotential_param_1];
	ld.param.u64 	%rd20, [setvectorpotential_param_2];
	ld.param.u64 	%rd21, [setvectorpotential_param_3];
	ld.param.u64 	%rd22, [setvectorpotential_param_5];
	ld.param.f32 	%f15, [setvectorpotential_param_6];
	ld.param.u32 	%r20, [setvectorpotential_param_7];
	ld.param.u32 	%r21, [setvectorpotential_param_8];
	ld.param.u32 	%r22, [setvectorpotential_param_9];
	cvta.to.global.u64 	%rd1, %rd21;
	cvta.to.global.u64 	%rd2, %rd22;
	mov.u32 	%r23, %ntid.x;
	mov.u32 	%r24, %ctaid.x;
	mul.lo.s32 	%r1, %r24, %r23;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r1, %r2;
	mov.u32 	%r25, %ntid.y;
	mov.u32 	%r26, %ctaid.y;
	mov.u32 	%r27, %tid.y;
	mad.lo.s32 	%r4, %r26, %r25, %r27;
	mov.u32 	%r28, %ntid.z;
	mov.u32 	%r29, %ctaid.z;
	mov.u32 	%r30, %tid.z;
	mad.lo.s32 	%r5, %r29, %r28, %r30;
	setp.ge.s32 	%p1, %r3, %r20;
	setp.ge.s32 	%p2, %r4, %r21;
	or.pred  	%p3, %p1, %p2;
	setp.ge.s32 	%p4, %r5, %r22;
	or.pred  	%p5, %p3, %p4;
	@%p5 bra 	$L__BB0_9;

	mul.lo.s32 	%r6, %r5, %r21;
	setp.lt.s32 	%p6, %r4, 1;
	mov.f32 	%f52, 0f00000000;
	mov.f32 	%f53, %f52;
	@%p6 bra 	$L__BB0_8;

	add.s32 	%r32, %r4, -1;
	and.b32  	%r47, %r4, 3;
	setp.lt.u32 	%p7, %r32, 3;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;
	mov.f32 	%f52, %f53;
	@%p7 bra 	$L__BB0_5;

	sub.s32 	%r45, %r4, %r47;
	add.s32 	%r34, %r6, 1;
	mad.lo.s32 	%r43, %r20, %r34, %r3;
	mul.lo.s32 	%r35, %r21, %r20;
	mad.lo.s32 	%r36, %r35, %r5, %r2;
	add.s32 	%r37, %r36, %r1;
	mul.wide.s32 	%rd23, %r37, 4;
	add.s64 	%rd40, %rd1, %rd23;
	shl.b32 	%r10, %r20, 2;
	mul.wide.s32 	%rd4, %r10, 4;
	add.s64 	%rd39, %rd2, %rd23;
	mul.wide.s32 	%rd6, %r20, 4;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;

$L__BB0_4:
	ld.global.nc.f32 	%f23, [%rd39];
	mul.f32 	%f24, %f23, %f15;
	sub.f32 	%f25, %f53, %f24;
	ld.global.nc.f32 	%f26, [%rd40];
	fma.rn.f32 	%f27, %f26, %f15, %f52;
	mul.wide.s32 	%rd24, %r43, 4;
	add.s64 	%rd25, %rd2, %rd24;
	ld.global.nc.f32 	%f28, [%rd25];
	mul.f32 	%f29, %f28, %f15;
	sub.f32 	%f30, %f25, %f29;
	add.s64 	%rd26, %rd1, %rd24;
	ld.global.nc.f32 	%f31, [%rd26];
	fma.rn.f32 	%f32, %f31, %f15, %f27;
	add.s64 	%rd27, %rd25, %rd6;
	ld.global.nc.f32 	%f33, [%rd27];
	mul.f32 	%f34, %f33, %f15;
	sub.f32 	%f35, %f30, %f34;
	add.s64 	%rd28, %rd26, %rd6;
	ld.global.nc.f32 	%f36, [%rd28];
	fma.rn.f32 	%f37, %f36, %f15, %f32;
	add.s64 	%rd29, %rd27, %rd6;
	ld.global.nc.f32 	%f38, [%rd29];
	mul.f32 	%f39, %f38, %f15;
	sub.f32 	%f53, %f35, %f39;
	add.s64 	%rd30, %rd28, %rd6;
	ld.global.nc.f32 	%f40, [%rd30];
	fma.rn.f32 	%f52, %f40, %f15, %f37;
	add.s32 	%r46, %r46, 4;
	add.s32 	%r43, %r43, %r10;
	add.s64 	%rd40, %rd40, %rd4;
	add.s64 	%rd39, %rd39, %rd4;
	add.s32 	%r45, %r45, -4;
	setp.ne.s32 	%p8, %r45, 0;
	@%p8 bra 	$L__BB0_4;

$L__BB0_5:
	setp.eq.s32 	%p9, %r47, 0;
	@%p9 bra 	$L__BB0_8;

	add.s32 	%r38, %r46, %r6;
	mad.lo.s32 	%r39, %r20, %r38, %r3;
	mul.wide.s32 	%rd31, %r39, 4;
	add.s64 	%rd42, %rd1, %rd31;
	mul.wide.s32 	%rd12, %r20, 4;
	add.s64 	%rd41, %rd2, %rd31;

$L__BB0_7:
	.pragma "nounroll";
	ld.global.nc.f32 	%f41, [%rd41];
	mul.f32 	%f42, %f41, %f15;
	sub.f32 	%f53, %f53, %f42;
	ld.global.nc.f32 	%f43, [%rd42];
	fma.rn.f32 	%f52, %f43, %f15, %f52;
	add.s64 	%rd42, %rd42, %rd12;
	add.s64 	%rd41, %rd41, %rd12;
	add.s32 	%r47, %r47, -1;
	setp.ne.s32 	%p10, %r47, 0;
	@%p10 bra 	$L__BB0_7;

$L__BB0_8:
	add.s32 	%r40, %r6, %r4;
	mad.lo.s32 	%r41, %r40, %r20, %r3;
	cvta.to.global.u64 	%rd32, %rd18;
	mul.wide.s32 	%rd33, %r41, 4;
	add.s64 	%rd34, %rd32, %rd33;
	st.global.f32 	[%rd34], %f53;
	cvta.to.global.u64 	%rd35, %rd19;
	add.s64 	%rd36, %rd35, %rd33;
	mov.u32 	%r42, 0;
	st.global.u32 	[%rd36], %r42;
	cvta.to.global.u64 	%rd37, %rd20;
	add.s64 	%rd38, %rd37, %rd33;
	st.global.f32 	[%rd38], %f52;

$L__BB0_9:
	ret;

}

`
	setvectorpotential_ptx_52 = `
.version 8.5
.target sm_52
.address_size 64

	// .globl	setvectorpotential

.visible .entry setvectorpotential(
	.param .u64 setvectorpotential_param_0,
	.param .u64 setvectorpotential_param_1,
	.param .u64 setvectorpotential_param_2,
	.param .u64 setvectorpotential_param_3,
	.param .u64 setvectorpotential_param_4,
	.param .u64 setvectorpotential_param_5,
	.param .f32 setvectorpotential_param_6,
	.param .u32 setvectorpotential_param_7,
	.param .u32 setvectorpotential_param_8,
	.param .u32 setvectorpotential_param_9,
	.param .u8 setvectorpotential_param_10
)
{
	.reg .pred 	%p<11>;
	.reg .f32 	%f<54>;
	.reg .b32 	%r<48>;
	.reg .b64 	%rd<43>;


	ld.param.u64 	%rd18, [setvectorpotential_param_0];
	ld.param.u64 	%rd19, [setvectorpotential_param_1];
	ld.param.u64 	%rd20, [setvectorpotential_param_2];
	ld.param.u64 	%rd21, [setvectorpotential_param_3];
	ld.param.u64 	%rd22, [setvectorpotential_param_5];
	ld.param.f32 	%f15, [setvectorpotential_param_6];
	ld.param.u32 	%r20, [setvectorpotential_param_7];
	ld.param.u32 	%r21, [setvectorpotential_param_8];
	ld.param.u32 	%r22, [setvectorpotential_param_9];
	cvta.to.global.u64 	%rd1, %rd21;
	cvta.to.global.u64 	%rd2, %rd22;
	mov.u32 	%r23, %ntid.x;
	mov.u32 	%r24, %ctaid.x;
	mul.lo.s32 	%r1, %r24, %r23;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r1, %r2;
	mov.u32 	%r25, %ntid.y;
	mov.u32 	%r26, %ctaid.y;
	mov.u32 	%r27, %tid.y;
	mad.lo.s32 	%r4, %r26, %r25, %r27;
	mov.u32 	%r28, %ntid.z;
	mov.u32 	%r29, %ctaid.z;
	mov.u32 	%r30, %tid.z;
	mad.lo.s32 	%r5, %r29, %r28, %r30;
	setp.ge.s32 	%p1, %r3, %r20;
	setp.ge.s32 	%p2, %r4, %r21;
	or.pred  	%p3, %p1, %p2;
	setp.ge.s32 	%p4, %r5, %r22;
	or.pred  	%p5, %p3, %p4;
	@%p5 bra 	$L__BB0_9;

	mul.lo.s32 	%r6, %r5, %r21;
	setp.lt.s32 	%p6, %r4, 1;
	mov.f32 	%f52, 0f00000000;
	mov.f32 	%f53, %f52;
	@%p6 bra 	$L__BB0_8;

	add.s32 	%r32, %r4, -1;
	and.b32  	%r47, %r4, 3;
	setp.lt.u32 	%p7, %r32, 3;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;
	mov.f32 	%f52, %f53;
	@%p7 bra 	$L__BB0_5;

	sub.s32 	%r45, %r4, %r47;
	add.s32 	%r34, %r6, 1;
	mad.lo.s32 	%r43, %r20, %r34, %r3;
	mul.lo.s32 	%r35, %r21, %r20;
	mad.lo.s32 	%r36, %r35, %r5, %r2;
	add.s32 	%r37, %r36, %r1;
	mul.wide.s32 	%rd23, %r37, 4;
	add.s64 	%rd40, %rd1, %rd23;
	shl.b32 	%r10, %r20, 2;
	mul.wide.s32 	%rd4, %r10, 4;
	add.s64 	%rd39, %rd2, %rd23;
	mul.wide.s32 	%rd6, %r20, 4;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;

$L__BB0_4:
	ld.global.nc.f32 	%f23, [%rd39];
	mul.f32 	%f24, %f23, %f15;
	sub.f32 	%f25, %f53, %f24;
	ld.global.nc.f32 	%f26, [%rd40];
	fma.rn.f32 	%f27, %f26, %f15, %f52;
	mul.wide.s32 	%rd24, %r43, 4;
	add.s64 	%rd25, %rd2, %rd24;
	ld.global.nc.f32 	%f28, [%rd25];
	mul.f32 	%f29, %f28, %f15;
	sub.f32 	%f30, %f25, %f29;
	add.s64 	%rd26, %rd1, %rd24;
	ld.global.nc.f32 	%f31, [%rd26];
	fma.rn.f32 	%f32, %f31, %f15, %f27;
	add.s64 	%rd27, %rd25, %rd6;
	ld.global.nc.f32 	%f33, [%rd27];
	mul.f32 	%f34, %f33, %f15;
	sub.f32 	%f35, %f30, %f34;
	add.s64 	%rd28, %rd26, %rd6;
	ld.global.nc.f32 	%f36, [%rd28];
	fma.rn.f32 	%f37, %f36, %f15, %f32;
	add.s64 	%rd29, %rd27, %rd6;
	ld.global.nc.f32 	%f38, [%rd29];
	mul.f32 	%f39, %f38, %f15;
	sub.f32 	%f53, %f35, %f39;
	add.s64 	%rd30, %rd28, %rd6;
	ld.global.nc.f32 	%f40, [%rd30];
	fma.rn.f32 	%f52, %f40, %f15, %f37;
	add.s32 	%r46, %r46, 4;
	add.s32 	%r43, %r43, %r10;
	add.s64 	%rd40, %rd40, %rd4;
	add.s64 	%rd39, %rd39, %rd4;
	add.s32 	%r45, %r45, -4;
	setp.ne.s32 	%p8, %r45, 0;
	@%p8 bra 	$L__BB0_4;

$L__BB0_5:
	setp.eq.s32 	%p9, %r47, 0;
	@%p9 bra 	$L__BB0_8;

	add.s32 	%r38, %r46, %r6;
	mad.lo.s32 	%r39, %r20, %r38, %r3;
	mul.wide.s32 	%rd31, %r39, 4;
	add.s64 	%rd42, %rd1, %rd31;
	mul.wide.s32 	%rd12, %r20, 4;
	add.s64 	%rd41, %rd2, %rd31;

$L__BB0_7:
	.pragma "nounroll";
	ld.global.nc.f32 	%f41, [%rd41];
	mul.f32 	%f42, %f41, %f15;
	sub.f32 	%f53, %f53, %f42;
	ld.global.nc.f32 	%f43, [%rd42];
	fma.rn.f32 	%f52, %f43, %f15, %f52;
	add.s64 	%rd42, %rd42, %rd12;
	add.s64 	%rd41, %rd41, %rd12;
	add.s32 	%r47, %r47, -1;
	setp.ne.s32 	%p10, %r47, 0;
	@%p10 bra 	$L__BB0_7;

$L__BB0_8:
	add.s32 	%r40, %r6, %r4;
	mad.lo.s32 	%r41, %r40, %r20, %r3;
	cvta.to.global.u64 	%rd32, %rd18;
	mul.wide.s32 	%rd33, %r41, 4;
	add.s64 	%rd34, %rd32, %rd33;
	st.global.f32 	[%rd34], %f53;
	cvta.to.global.u64 	%rd35, %rd19;
	add.s64 	%rd36, %rd35, %rd33;
	mov.u32 	%r42, 0;
	st.global.u32 	[%rd36], %r42;
	cvta.to.global.u64 	%rd37, %rd20;
	add.s64 	%rd38, %rd37, %rd33;
	st.global.f32 	[%rd38], %f52;

$L__BB0_9:
	ret;

}

`
	setvectorpotential_ptx_53 = `
.version 8.5
.target sm_53
.address_size 64

	// .globl	setvectorpotential

.visible .entry setvectorpotential(
	.param .u64 setvectorpotential_param_0,
	.param .u64 setvectorpotential_param_1,
	.param .u64 setvectorpotential_param_2,
	.param .u64 setvectorpotential_param_3,
	.param .u64 setvectorpotential_param_4,
	.param .u64 setvectorpotential_param_5,
	.param .f32 setvectorpotential_param_6,
	.param .u32 setvectorpotential_param_7,
	.param .u32 setvectorpotential_param_8,
	.param .u32 setvectorpotential_param_9,
	.param .u8 setvectorpotential_param_10
)
{
	.reg .pred 	%p<11>;
	.reg .f32 	%f<54>;
	.reg .b32 	%r<48>;
	.reg .b64 	%rd<43>;


	ld.param.u64 	%rd18, [setvectorpotential_param_0];
	ld.param.u64 	%rd19, [setvectorpotential_param_1];
	ld.param.u64 	%rd20, [setvectorpotential_param_2];
	ld.param.u64 	%rd21, [setvectorpotential_param_3];
	ld.param.u64 	%rd22, [setvectorpotential_param_5];
	ld.param.f32 	%f15, [setvectorpotential_param_6];
	ld.param.u32 	%r20, [setvectorpotential_param_7];
	ld.param.u32 	%r21, [setvectorpotential_param_8];
	ld.param.u32 	%r22, [setvectorpotential_param_9];
	cvta.to.global.u64 	%rd1, %rd21;
	cvta.to.global.u64 	%rd2, %rd22;
	mov.u32 	%r23, %ntid.x;
	mov.u32 	%r24, %ctaid.x;
	mul.lo.s32 	%r1, %r24, %r23;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r1, %r2;
	mov.u32 	%r25, %ntid.y;
	mov.u32 	%r26, %ctaid.y;
	mov.u32 	%r27, %tid.y;
	mad.lo.s32 	%r4, %r26, %r25, %r27;
	mov.u32 	%r28, %ntid.z;
	mov.u32 	%r29, %ctaid.z;
	mov.u32 	%r30, %tid.z;
	mad.lo.s32 	%r5, %r29, %r28, %r30;
	setp.ge.s32 	%p1, %r3, %r20;
	setp.ge.s32 	%p2, %r4, %r21;
	or.pred  	%p3, %p1, %p2;
	setp.ge.s32 	%p4, %r5, %r22;
	or.pred  	%p5, %p3, %p4;
	@%p5 bra 	$L__BB0_9;

	mul.lo.s32 	%r6, %r5, %r21;
	setp.lt.s32 	%p6, %r4, 1;
	mov.f32 	%f52, 0f00000000;
	mov.f32 	%f53, %f52;
	@%p6 bra 	$L__BB0_8;

	add.s32 	%r32, %r4, -1;
	and.b32  	%r47, %r4, 3;
	setp.lt.u32 	%p7, %r32, 3;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;
	mov.f32 	%f52, %f53;
	@%p7 bra 	$L__BB0_5;

	sub.s32 	%r45, %r4, %r47;
	add.s32 	%r34, %r6, 1;
	mad.lo.s32 	%r43, %r20, %r34, %r3;
	mul.lo.s32 	%r35, %r21, %r20;
	mad.lo.s32 	%r36, %r35, %r5, %r2;
	add.s32 	%r37, %r36, %r1;
	mul.wide.s32 	%rd23, %r37, 4;
	add.s64 	%rd40, %rd1, %rd23;
	shl.b32 	%r10, %r20, 2;
	mul.wide.s32 	%rd4, %r10, 4;
	add.s64 	%rd39, %rd2, %rd23;
	mul.wide.s32 	%rd6, %r20, 4;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;

$L__BB0_4:
	ld.global.nc.f32 	%f23, [%rd39];
	mul.f32 	%f24, %f23, %f15;
	sub.f32 	%f25, %f53, %f24;
	ld.global.nc.f32 	%f26, [%rd40];
	fma.rn.f32 	%f27, %f26, %f15, %f52;
	mul.wide.s32 	%rd24, %r43, 4;
	add.s64 	%rd25, %rd2, %rd24;
	ld.global.nc.f32 	%f28, [%rd25];
	mul.f32 	%f29, %f28, %f15;
	sub.f32 	%f30, %f25, %f29;
	add.s64 	%rd26, %rd1, %rd24;
	ld.global.nc.f32 	%f31, [%rd26];
	fma.rn.f32 	%f32, %f31, %f15, %f27;
	add.s64 	%rd27, %rd25, %rd6;
	ld.global.nc.f32 	%f33, [%rd27];
	mul.f32 	%f34, %f33, %f15;
	sub.f32 	%f35, %f30, %f34;
	add.s64 	%rd28, %rd26, %rd6;
	ld.global.nc.f32 	%f36, [%rd28];
	fma.rn.f32 	%f37, %f36, %f15, %f32;
	add.s64 	%rd29, %rd27, %rd6;
	ld.global.nc.f32 	%f38, [%rd29];
	mul.f32 	%f39, %f38, %f15;
	sub.f32 	%f53, %f35, %f39;
	add.s64 	%rd30, %rd28, %rd6;
	ld.global.nc.f32 	%f40, [%rd30];
	fma.rn.f32 	%f52, %f40, %f15, %f37;
	add.s32 	%r46, %r46, 4;
	add.s32 	%r43, %r43, %r10;
	add.s64 	%rd40, %rd40, %rd4;
	add.s64 	%rd39, %rd39, %rd4;
	add.s32 	%r45, %r45, -4;
	setp.ne.s32 	%p8, %r45, 0;
	@%p8 bra 	$L__BB0_4;

$L__BB0_5:
	setp.eq.s32 	%p9, %r47, 0;
	@%p9 bra 	$L__BB0_8;

	add.s32 	%r38, %r46, %r6;
	mad.lo.s32 	%r39, %r20, %r38, %r3;
	mul.wide.s32 	%rd31, %r39, 4;
	add.s64 	%rd42, %rd1, %rd31;
	mul.wide.s32 	%rd12, %r20, 4;
	add.s64 	%rd41, %rd2, %rd31;

$L__BB0_7:
	.pragma "nounroll";
	ld.global.nc.f32 	%f41, [%rd41];
	mul.f32 	%f42, %f41, %f15;
	sub.f32 	%f53, %f53, %f42;
	ld.global.nc.f32 	%f43, [%rd42];
	fma.rn.f32 	%f52, %f43, %f15, %f52;
	add.s64 	%rd42, %rd42, %rd12;
	add.s64 	%rd41, %rd41, %rd12;
	add.s32 	%r47, %r47, -1;
	setp.ne.s32 	%p10, %r47, 0;
	@%p10 bra 	$L__BB0_7;

$L__BB0_8:
	add.s32 	%r40, %r6, %r4;
	mad.lo.s32 	%r41, %r40, %r20, %r3;
	cvta.to.global.u64 	%rd32, %rd18;
	mul.wide.s32 	%rd33, %r41, 4;
	add.s64 	%rd34, %rd32, %rd33;
	st.global.f32 	[%rd34], %f53;
	cvta.to.global.u64 	%rd35, %rd19;
	add.s64 	%rd36, %rd35, %rd33;
	mov.u32 	%r42, 0;
	st.global.u32 	[%rd36], %r42;
	cvta.to.global.u64 	%rd37, %rd20;
	add.s64 	%rd38, %rd37, %rd33;
	st.global.f32 	[%rd38], %f52;

$L__BB0_9:
	ret;

}

`
	setvectorpotential_ptx_60 = `
.version 8.5
.target sm_60
.address_size 64

	// .globl	setvectorpotential

.visible .entry setvectorpotential(
	.param .u64 setvectorpotential_param_0,
	.param .u64 setvectorpotential_param_1,
	.param .u64 setvectorpotential_param_2,
	.param .u64 setvectorpotential_param_3,
	.param .u64 setvectorpotential_param_4,
	.param .u64 setvectorpotential_param_5,
	.param .f32 setvectorpotential_param_6,
	.param .u32 setvectorpotential_param_7,
	.param .u32 setvectorpotential_param_8,
	.param .u32 setvectorpotential_param_9,
	.param .u8 setvectorpotential_param_10
)
{
	.reg .pred 	%p<11>;
	.reg .f32 	%f<54>;
	.reg .b32 	%r<48>;
	.reg .b64 	%rd<43>;


	ld.param.u64 	%rd18, [setvectorpotential_param_0];
	ld.param.u64 	%rd19, [setvectorpotential_param_1];
	ld.param.u64 	%rd20, [setvectorpotential_param_2];
	ld.param.u64 	%rd21, [setvectorpotential_param_3];
	ld.param.u64 	%rd22, [setvectorpotential_param_5];
	ld.param.f32 	%f15, [setvectorpotential_param_6];
	ld.param.u32 	%r20, [setvectorpotential_param_7];
	ld.param.u32 	%r21, [setvectorpotential_param_8];
	ld.param.u32 	%r22, [setvectorpotential_param_9];
	cvta.to.global.u64 	%rd1, %rd21;
	cvta.to.global.u64 	%rd2, %rd22;
	mov.u32 	%r23, %ntid.x;
	mov.u32 	%r24, %ctaid.x;
	mul.lo.s32 	%r1, %r24, %r23;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r1, %r2;
	mov.u32 	%r25, %ntid.y;
	mov.u32 	%r26, %ctaid.y;
	mov.u32 	%r27, %tid.y;
	mad.lo.s32 	%r4, %r26, %r25, %r27;
	mov.u32 	%r28, %ntid.z;
	mov.u32 	%r29, %ctaid.z;
	mov.u32 	%r30, %tid.z;
	mad.lo.s32 	%r5, %r29, %r28, %r30;
	setp.ge.s32 	%p1, %r3, %r20;
	setp.ge.s32 	%p2, %r4, %r21;
	or.pred  	%p3, %p1, %p2;
	setp.ge.s32 	%p4, %r5, %r22;
	or.pred  	%p5, %p3, %p4;
	@%p5 bra 	$L__BB0_9;

	mul.lo.s32 	%r6, %r5, %r21;
	setp.lt.s32 	%p6, %r4, 1;
	mov.f32 	%f52, 0f00000000;
	mov.f32 	%f53, %f52;
	@%p6 bra 	$L__BB0_8;

	add.s32 	%r32, %r4, -1;
	and.b32  	%r47, %r4, 3;
	setp.lt.u32 	%p7, %r32, 3;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;
	mov.f32 	%f52, %f53;
	@%p7 bra 	$L__BB0_5;

	sub.s32 	%r45, %r4, %r47;
	add.s32 	%r34, %r6, 1;
	mad.lo.s32 	%r43, %r20, %r34, %r3;
	mul.lo.s32 	%r35, %r21, %r20;
	mad.lo.s32 	%r36, %r35, %r5, %r2;
	add.s32 	%r37, %r36, %r1;
	mul.wide.s32 	%rd23, %r37, 4;
	add.s64 	%rd40, %rd1, %rd23;
	shl.b32 	%r10, %r20, 2;
	mul.wide.s32 	%rd4, %r10, 4;
	add.s64 	%rd39, %rd2, %rd23;
	mul.wide.s32 	%rd6, %r20, 4;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;

$L__BB0_4:
	ld.global.nc.f32 	%f23, [%rd39];
	mul.f32 	%f24, %f23, %f15;
	sub.f32 	%f25, %f53, %f24;
	ld.global.nc.f32 	%f26, [%rd40];
	fma.rn.f32 	%f27, %f26, %f15, %f52;
	mul.wide.s32 	%rd24, %r43, 4;
	add.s64 	%rd25, %rd2, %rd24;
	ld.global.nc.f32 	%f28, [%rd25];
	mul.f32 	%f29, %f28, %f15;
	sub.f32 	%f30, %f25, %f29;
	add.s64 	%rd26, %rd1, %rd24;
	ld.global.nc.f32 	%f31, [%rd26];
	fma.rn.f32 	%f32, %f31, %f15, %f27;
	add.s64 	%rd27, %rd25, %rd6;
	ld.global.nc.f32 	%f33, [%rd27];
	mul.f32 	%f34, %f33, %f15;
	sub.f32 	%f35, %f30, %f34;
	add.s64 	%rd28, %rd26, %rd6;
	ld.global.nc.f32 	%f36, [%rd28];
	fma.rn.f32 	%f37, %f36, %f15, %f32;
	add.s64 	%rd29, %rd27, %rd6;
	ld.global.nc.f32 	%f38, [%rd29];
	mul.f32 	%f39, %f38, %f15;
	sub.f32 	%f53, %f35, %f39;
	add.s64 	%rd30, %rd28, %rd6;
	ld.global.nc.f32 	%f40, [%rd30];
	fma.rn.f32 	%f52, %f40, %f15, %f37;
	add.s32 	%r46, %r46, 4;
	add.s32 	%r43, %r43, %r10;
	add.s64 	%rd40, %rd40, %rd4;
	add.s64 	%rd39, %rd39, %rd4;
	add.s32 	%r45, %r45, -4;
	setp.ne.s32 	%p8, %r45, 0;
	@%p8 bra 	$L__BB0_4;

$L__BB0_5:
	setp.eq.s32 	%p9, %r47, 0;
	@%p9 bra 	$L__BB0_8;

	add.s32 	%r38, %r46, %r6;
	mad.lo.s32 	%r39, %r20, %r38, %r3;
	mul.wide.s32 	%rd31, %r39, 4;
	add.s64 	%rd42, %rd1, %rd31;
	mul.wide.s32 	%rd12, %r20, 4;
	add.s64 	%rd41, %rd2, %rd31;

$L__BB0_7:
	.pragma "nounroll";
	ld.global.nc.f32 	%f41, [%rd41];
	mul.f32 	%f42, %f41, %f15;
	sub.f32 	%f53, %f53, %f42;
	ld.global.nc.f32 	%f43, [%rd42];
	fma.rn.f32 	%f52, %f43, %f15, %f52;
	add.s64 	%rd42, %rd42, %rd12;
	add.s64 	%rd41, %rd41, %rd12;
	add.s32 	%r47, %r47, -1;
	setp.ne.s32 	%p10, %r47, 0;
	@%p10 bra 	$L__BB0_7;

$L__BB0_8:
	add.s32 	%r40, %r6, %r4;
	mad.lo.s32 	%r41, %r40, %r20, %r3;
	cvta.to.global.u64 	%rd32, %rd18;
	mul.wide.s32 	%rd33, %r41, 4;
	add.s64 	%rd34, %rd32, %rd33;
	st.global.f32 	[%rd34], %f53;
	cvta.to.global.u64 	%rd35, %rd19;
	add.s64 	%rd36, %rd35, %rd33;
	mov.u32 	%r42, 0;
	st.global.u32 	[%rd36], %r42;
	cvta.to.global.u64 	%rd37, %rd20;
	add.s64 	%rd38, %rd37, %rd33;
	st.global.f32 	[%rd38], %f52;

$L__BB0_9:
	ret;

}

`
	setvectorpotential_ptx_61 = `
.version 8.5
.target sm_61
.address_size 64

	// .globl	setvectorpotential

.visible .entry setvectorpotential(
	.param .u64 setvectorpotential_param_0,
	.param .u64 setvectorpotential_param_1,
	.param .u64 setvectorpotential_param_2,
	.param .u64 setvectorpotential_param_3,
	.param .u64 setvectorpotential_param_4,
	.param .u64 setvectorpotential_param_5,
	.param .f32 setvectorpotential_param_6,
	.param .u32 setvectorpotential_param_7,
	.param .u32 setvectorpotential_param_8,
	.param .u32 setvectorpotential_param_9,
	.param .u8 setvectorpotential_param_10
)
{
	.reg .pred 	%p<11>;
	.reg .f32 	%f<54>;
	.reg .b32 	%r<48>;
	.reg .b64 	%rd<43>;


	ld.param.u64 	%rd18, [setvectorpotential_param_0];
	ld.param.u64 	%rd19, [setvectorpotential_param_1];
	ld.param.u64 	%rd20, [setvectorpotential_param_2];
	ld.param.u64 	%rd21, [setvectorpotential_param_3];
	ld.param.u64 	%rd22, [setvectorpotential_param_5];
	ld.param.f32 	%f15, [setvectorpotential_param_6];
	ld.param.u32 	%r20, [setvectorpotential_param_7];
	ld.param.u32 	%r21, [setvectorpotential_param_8];
	ld.param.u32 	%r22, [setvectorpotential_param_9];
	cvta.to.global.u64 	%rd1, %rd21;
	cvta.to.global.u64 	%rd2, %rd22;
	mov.u32 	%r23, %ntid.x;
	mov.u32 	%r24, %ctaid.x;
	mul.lo.s32 	%r1, %r24, %r23;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r1, %r2;
	mov.u32 	%r25, %ntid.y;
	mov.u32 	%r26, %ctaid.y;
	mov.u32 	%r27, %tid.y;
	mad.lo.s32 	%r4, %r26, %r25, %r27;
	mov.u32 	%r28, %ntid.z;
	mov.u32 	%r29, %ctaid.z;
	mov.u32 	%r30, %tid.z;
	mad.lo.s32 	%r5, %r29, %r28, %r30;
	setp.ge.s32 	%p1, %r3, %r20;
	setp.ge.s32 	%p2, %r4, %r21;
	or.pred  	%p3, %p1, %p2;
	setp.ge.s32 	%p4, %r5, %r22;
	or.pred  	%p5, %p3, %p4;
	@%p5 bra 	$L__BB0_9;

	mul.lo.s32 	%r6, %r5, %r21;
	setp.lt.s32 	%p6, %r4, 1;
	mov.f32 	%f52, 0f00000000;
	mov.f32 	%f53, %f52;
	@%p6 bra 	$L__BB0_8;

	add.s32 	%r32, %r4, -1;
	and.b32  	%r47, %r4, 3;
	setp.lt.u32 	%p7, %r32, 3;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;
	mov.f32 	%f52, %f53;
	@%p7 bra 	$L__BB0_5;

	sub.s32 	%r45, %r4, %r47;
	add.s32 	%r34, %r6, 1;
	mad.lo.s32 	%r43, %r20, %r34, %r3;
	mul.lo.s32 	%r35, %r21, %r20;
	mad.lo.s32 	%r36, %r35, %r5, %r2;
	add.s32 	%r37, %r36, %r1;
	mul.wide.s32 	%rd23, %r37, 4;
	add.s64 	%rd40, %rd1, %rd23;
	shl.b32 	%r10, %r20, 2;
	mul.wide.s32 	%rd4, %r10, 4;
	add.s64 	%rd39, %rd2, %rd23;
	mul.wide.s32 	%rd6, %r20, 4;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;

$L__BB0_4:
	ld.global.nc.f32 	%f23, [%rd39];
	mul.f32 	%f24, %f23, %f15;
	sub.f32 	%f25, %f53, %f24;
	ld.global.nc.f32 	%f26, [%rd40];
	fma.rn.f32 	%f27, %f26, %f15, %f52;
	mul.wide.s32 	%rd24, %r43, 4;
	add.s64 	%rd25, %rd2, %rd24;
	ld.global.nc.f32 	%f28, [%rd25];
	mul.f32 	%f29, %f28, %f15;
	sub.f32 	%f30, %f25, %f29;
	add.s64 	%rd26, %rd1, %rd24;
	ld.global.nc.f32 	%f31, [%rd26];
	fma.rn.f32 	%f32, %f31, %f15, %f27;
	add.s64 	%rd27, %rd25, %rd6;
	ld.global.nc.f32 	%f33, [%rd27];
	mul.f32 	%f34, %f33, %f15;
	sub.f32 	%f35, %f30, %f34;
	add.s64 	%rd28, %rd26, %rd6;
	ld.global.nc.f32 	%f36, [%rd28];
	fma.rn.f32 	%f37, %f36, %f15, %f32;
	add.s64 	%rd29, %rd27, %rd6;
	ld.global.nc.f32 	%f38, [%rd29];
	mul.f32 	%f39, %f38, %f15;
	sub.f32 	%f53, %f35, %f39;
	add.s64 	%rd30, %rd28, %rd6;
	ld.global.nc.f32 	%f40, [%rd30];
	fma.rn.f32 	%f52, %f40, %f15, %f37;
	add.s32 	%r46, %r46, 4;
	add.s32 	%r43, %r43, %r10;
	add.s64 	%rd40, %rd40, %rd4;
	add.s64 	%rd39, %rd39, %rd4;
	add.s32 	%r45, %r45, -4;
	setp.ne.s32 	%p8, %r45, 0;
	@%p8 bra 	$L__BB0_4;

$L__BB0_5:
	setp.eq.s32 	%p9, %r47, 0;
	@%p9 bra 	$L__BB0_8;

	add.s32 	%r38, %r46, %r6;
	mad.lo.s32 	%r39, %r20, %r38, %r3;
	mul.wide.s32 	%rd31, %r39, 4;
	add.s64 	%rd42, %rd1, %rd31;
	mul.wide.s32 	%rd12, %r20, 4;
	add.s64 	%rd41, %rd2, %rd31;

$L__BB0_7:
	.pragma "nounroll";
	ld.global.nc.f32 	%f41, [%rd41];
	mul.f32 	%f42, %f41, %f15;
	sub.f32 	%f53, %f53, %f42;
	ld.global.nc.f32 	%f43, [%rd42];
	fma.rn.f32 	%f52, %f43, %f15, %f52;
	add.s64 	%rd42, %rd42, %rd12;
	add.s64 	%rd41, %rd41, %rd12;
	add.s32 	%r47, %r47, -1;
	setp.ne.s32 	%p10, %r47, 0;
	@%p10 bra 	$L__BB0_7;

$L__BB0_8:
	add.s32 	%r40, %r6, %r4;
	mad.lo.s32 	%r41, %r40, %r20, %r3;
	cvta.to.global.u64 	%rd32, %rd18;
	mul.wide.s32 	%rd33, %r41, 4;
	add.s64 	%rd34, %rd32, %rd33;
	st.global.f32 	[%rd34], %f53;
	cvta.to.global.u64 	%rd35, %rd19;
	add.s64 	%rd36, %rd35, %rd33;
	mov.u32 	%r42, 0;
	st.global.u32 	[%rd36], %r42;
	cvta.to.global.u64 	%rd37, %rd20;
	add.s64 	%rd38, %rd37, %rd33;
	st.global.f32 	[%rd38], %f52;

$L__BB0_9:
	ret;

}

`
	setvectorpotential_ptx_62 = `
.version 8.5
.target sm_62
.address_size 64

	// .globl	setvectorpotential

.visible .entry setvectorpotential(
	.param .u64 setvectorpotential_param_0,
	.param .u64 setvectorpotential_param_1,
	.param .u64 setvectorpotential_param_2,
	.param .u64 setvectorpotential_param_3,
	.param .u64 setvectorpotential_param_4,
	.param .u64 setvectorpotential_param_5,
	.param .f32 setvectorpotential_param_6,
	.param .u32 setvectorpotential_param_7,
	.param .u32 setvectorpotential_param_8,
	.param .u32 setvectorpotential_param_9,
	.param .u8 setvectorpotential_param_10
)
{
	.reg .pred 	%p<11>;
	.reg .f32 	%f<54>;
	.reg .b32 	%r<48>;
	.reg .b64 	%rd<43>;


	ld.param.u64 	%rd18, [setvectorpotential_param_0];
	ld.param.u64 	%rd19, [setvectorpotential_param_1];
	ld.param.u64 	%rd20, [setvectorpotential_param_2];
	ld.param.u64 	%rd21, [setvectorpotential_param_3];
	ld.param.u64 	%rd22, [setvectorpotential_param_5];
	ld.param.f32 	%f15, [setvectorpotential_param_6];
	ld.param.u32 	%r20, [setvectorpotential_param_7];
	ld.param.u32 	%r21, [setvectorpotential_param_8];
	ld.param.u32 	%r22, [setvectorpotential_param_9];
	cvta.to.global.u64 	%rd1, %rd21;
	cvta.to.global.u64 	%rd2, %rd22;
	mov.u32 	%r23, %ntid.x;
	mov.u32 	%r24, %ctaid.x;
	mul.lo.s32 	%r1, %r24, %r23;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r1, %r2;
	mov.u32 	%r25, %ntid.y;
	mov.u32 	%r26, %ctaid.y;
	mov.u32 	%r27, %tid.y;
	mad.lo.s32 	%r4, %r26, %r25, %r27;
	mov.u32 	%r28, %ntid.z;
	mov.u32 	%r29, %ctaid.z;
	mov.u32 	%r30, %tid.z;
	mad.lo.s32 	%r5, %r29, %r28, %r30;
	setp.ge.s32 	%p1, %r3, %r20;
	setp.ge.s32 	%p2, %r4, %r21;
	or.pred  	%p3, %p1, %p2;
	setp.ge.s32 	%p4, %r5, %r22;
	or.pred  	%p5, %p3, %p4;
	@%p5 bra 	$L__BB0_9;

	mul.lo.s32 	%r6, %r5, %r21;
	setp.lt.s32 	%p6, %r4, 1;
	mov.f32 	%f52, 0f00000000;
	mov.f32 	%f53, %f52;
	@%p6 bra 	$L__BB0_8;

	add.s32 	%r32, %r4, -1;
	and.b32  	%r47, %r4, 3;
	setp.lt.u32 	%p7, %r32, 3;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;
	mov.f32 	%f52, %f53;
	@%p7 bra 	$L__BB0_5;

	sub.s32 	%r45, %r4, %r47;
	add.s32 	%r34, %r6, 1;
	mad.lo.s32 	%r43, %r20, %r34, %r3;
	mul.lo.s32 	%r35, %r21, %r20;
	mad.lo.s32 	%r36, %r35, %r5, %r2;
	add.s32 	%r37, %r36, %r1;
	mul.wide.s32 	%rd23, %r37, 4;
	add.s64 	%rd40, %rd1, %rd23;
	shl.b32 	%r10, %r20, 2;
	mul.wide.s32 	%rd4, %r10, 4;
	add.s64 	%rd39, %rd2, %rd23;
	mul.wide.s32 	%rd6, %r20, 4;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;

$L__BB0_4:
	ld.global.nc.f32 	%f23, [%rd39];
	mul.f32 	%f24, %f23, %f15;
	sub.f32 	%f25, %f53, %f24;
	ld.global.nc.f32 	%f26, [%rd40];
	fma.rn.f32 	%f27, %f26, %f15, %f52;
	mul.wide.s32 	%rd24, %r43, 4;
	add.s64 	%rd25, %rd2, %rd24;
	ld.global.nc.f32 	%f28, [%rd25];
	mul.f32 	%f29, %f28, %f15;
	sub.f32 	%f30, %f25, %f29;
	add.s64 	%rd26, %rd1, %rd24;
	ld.global.nc.f32 	%f31, [%rd26];
	fma.rn.f32 	%f32, %f31, %f15, %f27;
	add.s64 	%rd27, %rd25, %rd6;
	ld.global.nc.f32 	%f33, [%rd27];
	mul.f32 	%f34, %f33, %f15;
	sub.f32 	%f35, %f30, %f34;
	add.s64 	%rd28, %rd26, %rd6;
	ld.global.nc.f32 	%f36, [%rd28];
	fma.rn.f32 	%f37, %f36, %f15, %f32;
	add.s64 	%rd29, %rd27, %rd6;
	ld.global.nc.f32 	%f38, [%rd29];
	mul.f32 	%f39, %f38, %f15;
	sub.f32 	%f53, %f35, %f39;
	add.s64 	%rd30, %rd28, %rd6;
	ld.global.nc.f32 	%f40, [%rd30];
	fma.rn.f32 	%f52, %f40, %f15, %f37;
	add.s32 	%r46, %r46, 4;
	add.s32 	%r43, %r43, %r10;
	add.s64 	%rd40, %rd40, %rd4;
	add.s64 	%rd39, %rd39, %rd4;
	add.s32 	%r45, %r45, -4;
	setp.ne.s32 	%p8, %r45, 0;
	@%p8 bra 	$L__BB0_4;

$L__BB0_5:
	setp.eq.s32 	%p9, %r47, 0;
	@%p9 bra 	$L__BB0_8;

	add.s32 	%r38, %r46, %r6;
	mad.lo.s32 	%r39, %r20, %r38, %r3;
	mul.wide.s32 	%rd31, %r39, 4;
	add.s64 	%rd42, %rd1, %rd31;
	mul.wide.s32 	%rd12, %r20, 4;
	add.s64 	%rd41, %rd2, %rd31;

$L__BB0_7:
	.pragma "nounroll";
	ld.global.nc.f32 	%f41, [%rd41];
	mul.f32 	%f42, %f41, %f15;
	sub.f32 	%f53, %f53, %f42;
	ld.global.nc.f32 	%f43, [%rd42];
	fma.rn.f32 	%f52, %f43, %f15, %f52;
	add.s64 	%rd42, %rd42, %rd12;
	add.s64 	%rd41, %rd41, %rd12;
	add.s32 	%r47, %r47, -1;
	setp.ne.s32 	%p10, %r47, 0;
	@%p10 bra 	$L__BB0_7;

$L__BB0_8:
	add.s32 	%r40, %r6, %r4;
	mad.lo.s32 	%r41, %r40, %r20, %r3;
	cvta.to.global.u64 	%rd32, %rd18;
	mul.wide.s32 	%rd33, %r41, 4;
	add.s64 	%rd34, %rd32, %rd33;
	st.global.f32 	[%rd34], %f53;
	cvta.to.global.u64 	%rd35, %rd19;
	add.s64 	%rd36, %rd35, %rd33;
	mov.u32 	%r42, 0;
	st.global.u32 	[%rd36], %r42;
	cvta.to.global.u64 	%rd37, %rd20;
	add.s64 	%rd38, %rd37, %rd33;
	st.global.f32 	[%rd38], %f52;

$L__BB0_9:
	ret;

}

`
	setvectorpotential_ptx_70 = `
.version 8.5
.target sm_70
.address_size 64

	// .globl	setvectorpotential

.visible .entry setvectorpotential(
	.param .u64 setvectorpotential_param_0,
	.param .u64 setvectorpotential_param_1,
	.param .u64 setvectorpotential_param_2,
	.param .u64 setvectorpotential_param_3,
	.param .u64 setvectorpotential_param_4,
	.param .u64 setvectorpotential_param_5,
	.param .f32 setvectorpotential_param_6,
	.param .u32 setvectorpotential_param_7,
	.param .u32 setvectorpotential_param_8,
	.param .u32 setvectorpotential_param_9,
	.param .u8 setvectorpotential_param_10
)
{
	.reg .pred 	%p<11>;
	.reg .f32 	%f<54>;
	.reg .b32 	%r<48>;
	.reg .b64 	%rd<43>;


	ld.param.u64 	%rd18, [setvectorpotential_param_0];
	ld.param.u64 	%rd19, [setvectorpotential_param_1];
	ld.param.u64 	%rd20, [setvectorpotential_param_2];
	ld.param.u64 	%rd21, [setvectorpotential_param_3];
	ld.param.u64 	%rd22, [setvectorpotential_param_5];
	ld.param.f32 	%f15, [setvectorpotential_param_6];
	ld.param.u32 	%r20, [setvectorpotential_param_7];
	ld.param.u32 	%r21, [setvectorpotential_param_8];
	ld.param.u32 	%r22, [setvectorpotential_param_9];
	cvta.to.global.u64 	%rd1, %rd21;
	cvta.to.global.u64 	%rd2, %rd22;
	mov.u32 	%r23, %ntid.x;
	mov.u32 	%r24, %ctaid.x;
	mul.lo.s32 	%r1, %r24, %r23;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r1, %r2;
	mov.u32 	%r25, %ntid.y;
	mov.u32 	%r26, %ctaid.y;
	mov.u32 	%r27, %tid.y;
	mad.lo.s32 	%r4, %r26, %r25, %r27;
	mov.u32 	%r28, %ntid.z;
	mov.u32 	%r29, %ctaid.z;
	mov.u32 	%r30, %tid.z;
	mad.lo.s32 	%r5, %r29, %r28, %r30;
	setp.ge.s32 	%p1, %r3, %r20;
	setp.ge.s32 	%p2, %r4, %r21;
	or.pred  	%p3, %p1, %p2;
	setp.ge.s32 	%p4, %r5, %r22;
	or.pred  	%p5, %p3, %p4;
	@%p5 bra 	$L__BB0_9;

	mul.lo.s32 	%r6, %r5, %r21;
	setp.lt.s32 	%p6, %r4, 1;
	mov.f32 	%f52, 0f00000000;
	mov.f32 	%f53, %f52;
	@%p6 bra 	$L__BB0_8;

	add.s32 	%r32, %r4, -1;
	and.b32  	%r47, %r4, 3;
	setp.lt.u32 	%p7, %r32, 3;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;
	mov.f32 	%f52, %f53;
	@%p7 bra 	$L__BB0_5;

	sub.s32 	%r45, %r4, %r47;
	add.s32 	%r34, %r6, 1;
	mad.lo.s32 	%r43, %r20, %r34, %r3;
	mul.lo.s32 	%r35, %r21, %r20;
	mad.lo.s32 	%r36, %r35, %r5, %r2;
	add.s32 	%r37, %r36, %r1;
	mul.wide.s32 	%rd23, %r37, 4;
	add.s64 	%rd40, %rd1, %rd23;
	shl.b32 	%r10, %r20, 2;
	mul.wide.s32 	%rd4, %r10, 4;
	add.s64 	%rd39, %rd2, %rd23;
	mul.wide.s32 	%rd6, %r20, 4;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;

$L__BB0_4:
	ld.global.nc.f32 	%f23, [%rd39];
	mul.f32 	%f24, %f23, %f15;
	sub.f32 	%f25, %f53, %f24;
	ld.global.nc.f32 	%f26, [%rd40];
	fma.rn.f32 	%f27, %f26, %f15, %f52;
	mul.wide.s32 	%rd24, %r43, 4;
	add.s64 	%rd25, %rd2, %rd24;
	ld.global.nc.f32 	%f28, [%rd25];
	mul.f32 	%f29, %f28, %f15;
	sub.f32 	%f30, %f25, %f29;
	add.s64 	%rd26, %rd1, %rd24;
	ld.global.nc.f32 	%f31, [%rd26];
	fma.rn.f32 	%f32, %f31, %f15, %f27;
	add.s64 	%rd27, %rd25, %rd6;
	ld.global.nc.f32 	%f33, [%rd27];
	mul.f32 	%f34, %f33, %f15;
	sub.f32 	%f35, %f30, %f34;
	add.s64 	%rd28, %rd26, %rd6;
	ld.global.nc.f32 	%f36, [%rd28];
	fma.rn.f32 	%f37, %f36, %f15, %f32;
	add.s64 	%rd29, %rd27, %rd6;
	ld.global.nc.f32 	%f38, [%rd29];
	mul.f32 	%f39, %f38, %f15;
	sub.f32 	%f53, %f35, %f39;
	add.s64 	%rd30, %rd28, %rd6;
	ld.global.nc.f32 	%f40, [%rd30];
	fma.rn.f32 	%f52, %f40, %f15, %f37;
	add.s32 	%r46, %r46, 4;
	add.s32 	%r43, %r43, %r10;
	add.s64 	%rd40, %rd40, %rd4;
	add.s64 	%rd39, %rd39, %rd4;
	add.s32 	%r45, %r45, -4;
	setp.ne.s32 	%p8, %r45, 0;
	@%p8 bra 	$L__BB0_4;

$L__BB0_5:
	setp.eq.s32 	%p9, %r47, 0;
	@%p9 bra 	$L__BB0_8;

	add.s32 	%r38, %r46, %r6;
	mad.lo.s32 	%r39, %r20, %r38, %r3;
	mul.wide.s32 	%rd31, %r39, 4;
	add.s64 	%rd42, %rd1, %rd31;
	mul.wide.s32 	%rd12, %r20, 4;
	add.s64 	%rd41, %rd2, %rd31;

$L__BB0_7:
	.pragma "nounroll";
	ld.global.nc.f32 	%f41, [%rd41];
	mul.f32 	%f42, %f41, %f15;
	sub.f32 	%f53, %f53, %f42;
	ld.global.nc.f32 	%f43, [%rd42];
	fma.rn.f32 	%f52, %f43, %f15, %f52;
	add.s64 	%rd42, %rd42, %rd12;
	add.s64 	%rd41, %rd41, %rd12;
	add.s32 	%r47, %r47, -1;
	setp.ne.s32 	%p10, %r47, 0;
	@%p10 bra 	$L__BB0_7;

$L__BB0_8:
	add.s32 	%r40, %r6, %r4;
	mad.lo.s32 	%r41, %r40, %r20, %r3;
	cvta.to.global.u64 	%rd32, %rd18;
	mul.wide.s32 	%rd33, %r41, 4;
	add.s64 	%rd34, %rd32, %rd33;
	st.global.f32 	[%rd34], %f53;
	cvta.to.global.u64 	%rd35, %rd19;
	add.s64 	%rd36, %rd35, %rd33;
	mov.u32 	%r42, 0;
	st.global.u32 	[%rd36], %r42;
	cvta.to.global.u64 	%rd37, %rd20;
	add.s64 	%rd38, %rd37, %rd33;
	st.global.f32 	[%rd38], %f52;

$L__BB0_9:
	ret;

}

`
	setvectorpotential_ptx_72 = `
.version 8.5
.target sm_72
.address_size 64

	// .globl	setvectorpotential

.visible .entry setvectorpotential(
	.param .u64 setvectorpotential_param_0,
	.param .u64 setvectorpotential_param_1,
	.param .u64 setvectorpotential_param_2,
	.param .u64 setvectorpotential_param_3,
	.param .u64 setvectorpotential_param_4,
	.param .u64 setvectorpotential_param_5,
	.param .f32 setvectorpotential_param_6,
	.param .u32 setvectorpotential_param_7,
	.param .u32 setvectorpotential_param_8,
	.param .u32 setvectorpotential_param_9,
	.param .u8 setvectorpotential_param_10
)
{
	.reg .pred 	%p<11>;
	.reg .f32 	%f<54>;
	.reg .b32 	%r<48>;
	.reg .b64 	%rd<43>;


	ld.param.u64 	%rd18, [setvectorpotential_param_0];
	ld.param.u64 	%rd19, [setvectorpotential_param_1];
	ld.param.u64 	%rd20, [setvectorpotential_param_2];
	ld.param.u64 	%rd21, [setvectorpotential_param_3];
	ld.param.u64 	%rd22, [setvectorpotential_param_5];
	ld.param.f32 	%f15, [setvectorpotential_param_6];
	ld.param.u32 	%r20, [setvectorpotential_param_7];
	ld.param.u32 	%r21, [setvectorpotential_param_8];
	ld.param.u32 	%r22, [setvectorpotential_param_9];
	cvta.to.global.u64 	%rd1, %rd21;
	cvta.to.global.u64 	%rd2, %rd22;
	mov.u32 	%r23, %ntid.x;
	mov.u32 	%r24, %ctaid.x;
	mul.lo.s32 	%r1, %r24, %r23;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r1, %r2;
	mov.u32 	%r25, %ntid.y;
	mov.u32 	%r26, %ctaid.y;
	mov.u32 	%r27, %tid.y;
	mad.lo.s32 	%r4, %r26, %r25, %r27;
	mov.u32 	%r28, %ntid.z;
	mov.u32 	%r29, %ctaid.z;
	mov.u32 	%r30, %tid.z;
	mad.lo.s32 	%r5, %r29, %r28, %r30;
	setp.ge.s32 	%p1, %r3, %r20;
	setp.ge.s32 	%p2, %r4, %r21;
	or.pred  	%p3, %p1, %p2;
	setp.ge.s32 	%p4, %r5, %r22;
	or.pred  	%p5, %p3, %p4;
	@%p5 bra 	$L__BB0_9;

	mul.lo.s32 	%r6, %r5, %r21;
	setp.lt.s32 	%p6, %r4, 1;
	mov.f32 	%f52, 0f00000000;
	mov.f32 	%f53, %f52;
	@%p6 bra 	$L__BB0_8;

	add.s32 	%r32, %r4, -1;
	and.b32  	%r47, %r4, 3;
	setp.lt.u32 	%p7, %r32, 3;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;
	mov.f32 	%f52, %f53;
	@%p7 bra 	$L__BB0_5;

	sub.s32 	%r45, %r4, %r47;
	add.s32 	%r34, %r6, 1;
	mad.lo.s32 	%r43, %r20, %r34, %r3;
	mul.lo.s32 	%r35, %r21, %r20;
	mad.lo.s32 	%r36, %r35, %r5, %r2;
	add.s32 	%r37, %r36, %r1;
	mul.wide.s32 	%rd23, %r37, 4;
	add.s64 	%rd40, %rd1, %rd23;
	shl.b32 	%r10, %r20, 2;
	mul.wide.s32 	%rd4, %r10, 4;
	add.s64 	%rd39, %rd2, %rd23;
	mul.wide.s32 	%rd6, %r20, 4;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;

$L__BB0_4:
	ld.global.nc.f32 	%f23, [%rd39];
	mul.f32 	%f24, %f23, %f15;
	sub.f32 	%f25, %f53, %f24;
	ld.global.nc.f32 	%f26, [%rd40];
	fma.rn.f32 	%f27, %f26, %f15, %f52;
	mul.wide.s32 	%rd24, %r43, 4;
	add.s64 	%rd25, %rd2, %rd24;
	ld.global.nc.f32 	%f28, [%rd25];
	mul.f32 	%f29, %f28, %f15;
	sub.f32 	%f30, %f25, %f29;
	add.s64 	%rd26, %rd1, %rd24;
	ld.global.nc.f32 	%f31, [%rd26];
	fma.rn.f32 	%f32, %f31, %f15, %f27;
	add.s64 	%rd27, %rd25, %rd6;
	ld.global.nc.f32 	%f33, [%rd27];
	mul.f32 	%f34, %f33, %f15;
	sub.f32 	%f35, %f30, %f34;
	add.s64 	%rd28, %rd26, %rd6;
	ld.global.nc.f32 	%f36, [%rd28];
	fma.rn.f32 	%f37, %f36, %f15, %f32;
	add.s64 	%rd29, %rd27, %rd6;
	ld.global.nc.f32 	%f38, [%rd29];
	mul.f32 	%f39, %f38, %f15;
	sub.f32 	%f53, %f35, %f39;
	add.s64 	%rd30, %rd28, %rd6;
	ld.global.nc.f32 	%f40, [%rd30];
	fma.rn.f32 	%f52, %f40, %f15, %f37;
	add.s32 	%r46, %r46, 4;
	add.s32 	%r43, %r43, %r10;
	add.s64 	%rd40, %rd40, %rd4;
	add.s64 	%rd39, %rd39, %rd4;
	add.s32 	%r45, %r45, -4;
	setp.ne.s32 	%p8, %r45, 0;
	@%p8 bra 	$L__BB0_4;

$L__BB0_5:
	setp.eq.s32 	%p9, %r47, 0;
	@%p9 bra 	$L__BB0_8;

	add.s32 	%r38, %r46, %r6;
	mad.lo.s32 	%r39, %r20, %r38, %r3;
	mul.wide.s32 	%rd31, %r39, 4;
	add.s64 	%rd42, %rd1, %rd31;
	mul.wide.s32 	%rd12, %r20, 4;
	add.s64 	%rd41, %rd2, %rd31;

$L__BB0_7:
	.pragma "nounroll";
	ld.global.nc.f32 	%f41, [%rd41];
	mul.f32 	%f42, %f41, %f15;
	sub.f32 	%f53, %f53, %f42;
	ld.global.nc.f32 	%f43, [%rd42];
	fma.rn.f32 	%f52, %f43, %f15, %f52;
	add.s64 	%rd42, %rd42, %rd12;
	add.s64 	%rd41, %rd41, %rd12;
	add.s32 	%r47, %r47, -1;
	setp.ne.s32 	%p10, %r47, 0;
	@%p10 bra 	$L__BB0_7;

$L__BB0_8:
	add.s32 	%r40, %r6, %r4;
	mad.lo.s32 	%r41, %r40, %r20, %r3;
	cvta.to.global.u64 	%rd32, %rd18;
	mul.wide.s32 	%rd33, %r41, 4;
	add.s64 	%rd34, %rd32, %rd33;
	st.global.f32 	[%rd34], %f53;
	cvta.to.global.u64 	%rd35, %rd19;
	add.s64 	%rd36, %rd35, %rd33;
	mov.u32 	%r42, 0;
	st.global.u32 	[%rd36], %r42;
	cvta.to.global.u64 	%rd37, %rd20;
	add.s64 	%rd38, %rd37, %rd33;
	st.global.f32 	[%rd38], %f52;

$L__BB0_9:
	ret;

}

`
	setvectorpotential_ptx_75 = `
.version 8.5
.target sm_75
.address_size 64

	// .globl	setvectorpotential

.visible .entry setvectorpotential(
	.param .u64 setvectorpotential_param_0,
	.param .u64 setvectorpotential_param_1,
	.param .u64 setvectorpotential_param_2,
	.param .u64 setvectorpotential_param_3,
	.param .u64 setvectorpotential_param_4,
	.param .u64 setvectorpotential_param_5,
	.param .f32 setvectorpotential_param_6,
	.param .u32 setvectorpotential_param_7,
	.param .u32 setvectorpotential_param_8,
	.param .u32 setvectorpotential_param_9,
	.param .u8 setvectorpotential_param_10
)
{
	.reg .pred 	%p<11>;
	.reg .f32 	%f<54>;
	.reg .b32 	%r<48>;
	.reg .b64 	%rd<43>;


	ld.param.u64 	%rd18, [setvectorpotential_param_0];
	ld.param.u64 	%rd19, [setvectorpotential_param_1];
	ld.param.u64 	%rd20, [setvectorpotential_param_2];
	ld.param.u64 	%rd21, [setvectorpotential_param_3];
	ld.param.u64 	%rd22, [setvectorpotential_param_5];
	ld.param.f32 	%f15, [setvectorpotential_param_6];
	ld.param.u32 	%r20, [setvectorpotential_param_7];
	ld.param.u32 	%r21, [setvectorpotential_param_8];
	ld.param.u32 	%r22, [setvectorpotential_param_9];
	cvta.to.global.u64 	%rd1, %rd21;
	cvta.to.global.u64 	%rd2, %rd22;
	mov.u32 	%r23, %ntid.x;
	mov.u32 	%r24, %ctaid.x;
	mul.lo.s32 	%r1, %r24, %r23;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r1, %r2;
	mov.u32 	%r25, %ntid.y;
	mov.u32 	%r26, %ctaid.y;
	mov.u32 	%r27, %tid.y;
	mad.lo.s32 	%r4, %r26, %r25, %r27;
	mov.u32 	%r28, %ntid.z;
	mov.u32 	%r29, %ctaid.z;
	mov.u32 	%r30, %tid.z;
	mad.lo.s32 	%r5, %r29, %r28, %r30;
	setp.ge.s32 	%p1, %r3, %r20;
	setp.ge.s32 	%p2, %r4, %r21;
	or.pred  	%p3, %p1, %p2;
	setp.ge.s32 	%p4, %r5, %r22;
	or.pred  	%p5, %p3, %p4;
	@%p5 bra 	$L__BB0_9;

	mul.lo.s32 	%r6, %r5, %r21;
	setp.lt.s32 	%p6, %r4, 1;
	mov.f32 	%f52, 0f00000000;
	mov.f32 	%f53, %f52;
	@%p6 bra 	$L__BB0_8;

	add.s32 	%r32, %r4, -1;
	and.b32  	%r47, %r4, 3;
	setp.lt.u32 	%p7, %r32, 3;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;
	mov.f32 	%f52, %f53;
	@%p7 bra 	$L__BB0_5;

	sub.s32 	%r45, %r4, %r47;
	add.s32 	%r34, %r6, 1;
	mad.lo.s32 	%r43, %r20, %r34, %r3;
	mul.lo.s32 	%r35, %r21, %r20;
	mad.lo.s32 	%r36, %r35, %r5, %r2;
	add.s32 	%r37, %r36, %r1;
	mul.wide.s32 	%rd23, %r37, 4;
	add.s64 	%rd40, %rd1, %rd23;
	shl.b32 	%r10, %r20, 2;
	mul.wide.s32 	%rd4, %r10, 4;
	add.s64 	%rd39, %rd2, %rd23;
	mul.wide.s32 	%rd6, %r20, 4;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;

$L__BB0_4:
	ld.global.nc.f32 	%f23, [%rd39];
	mul.f32 	%f24, %f23, %f15;
	sub.f32 	%f25, %f53, %f24;
	ld.global.nc.f32 	%f26, [%rd40];
	fma.rn.f32 	%f27, %f26, %f15, %f52;
	mul.wide.s32 	%rd24, %r43, 4;
	add.s64 	%rd25, %rd2, %rd24;
	ld.global.nc.f32 	%f28, [%rd25];
	mul.f32 	%f29, %f28, %f15;
	sub.f32 	%f30, %f25, %f29;
	add.s64 	%rd26, %rd1, %rd24;
	ld.global.nc.f32 	%f31, [%rd26];
	fma.rn.f32 	%f32, %f31, %f15, %f27;
	add.s64 	%rd27, %rd25, %rd6;
	ld.global.nc.f32 	%f33, [%rd27];
	mul.f32 	%f34, %f33, %f15;
	sub.f32 	%f35, %f30, %f34;
	add.s64 	%rd28, %rd26, %rd6;
	ld.global.nc.f32 	%f36, [%rd28];
	fma.rn.f32 	%f37, %f36, %f15, %f32;
	add.s64 	%rd29, %rd27, %rd6;
	ld.global.nc.f32 	%f38, [%rd29];
	mul.f32 	%f39, %f38, %f15;
	sub.f32 	%f53, %f35, %f39;
	add.s64 	%rd30, %rd28, %rd6;
	ld.global.nc.f32 	%f40, [%rd30];
	fma.rn.f32 	%f52, %f40, %f15, %f37;
	add.s32 	%r46, %r46, 4;
	add.s32 	%r43, %r43, %r10;
	add.s64 	%rd40, %rd40, %rd4;
	add.s64 	%rd39, %rd39, %rd4;
	add.s32 	%r45, %r45, -4;
	setp.ne.s32 	%p8, %r45, 0;
	@%p8 bra 	$L__BB0_4;

$L__BB0_5:
	setp.eq.s32 	%p9, %r47, 0;
	@%p9 bra 	$L__BB0_8;

	add.s32 	%r38, %r46, %r6;
	mad.lo.s32 	%r39, %r20, %r38, %r3;
	mul.wide.s32 	%rd31, %r39, 4;
	add.s64 	%rd42, %rd1, %rd31;
	mul.wide.s32 	%rd12, %r20, 4;
	add.s64 	%rd41, %rd2, %rd31;

$L__BB0_7:
	.pragma "nounroll";
	ld.global.nc.f32 	%f41, [%rd41];
	mul.f32 	%f42, %f41, %f15;
	sub.f32 	%f53, %f53, %f42;
	ld.global.nc.f32 	%f43, [%rd42];
	fma.rn.f32 	%f52, %f43, %f15, %f52;
	add.s64 	%rd42, %rd42, %rd12;
	add.s64 	%rd41, %rd41, %rd12;
	add.s32 	%r47, %r47, -1;
	setp.ne.s32 	%p10, %r47, 0;
	@%p10 bra 	$L__BB0_7;

$L__BB0_8:
	add.s32 	%r40, %r6, %r4;
	mad.lo.s32 	%r41, %r40, %r20, %r3;
	cvta.to.global.u64 	%rd32, %rd18;
	mul.wide.s32 	%rd33, %r41, 4;
	add.s64 	%rd34, %rd32, %rd33;
	st.global.f32 	[%rd34], %f53;
	cvta.to.global.u64 	%rd35, %rd19;
	add.s64 	%rd36, %rd35, %rd33;
	mov.u32 	%r42, 0;
	st.global.u32 	[%rd36], %r42;
	cvta.to.global.u64 	%rd37, %rd20;
	add.s64 	%rd38, %rd37, %rd33;
	st.global.f32 	[%rd38], %f52;

$L__BB0_9:
	ret;

}

`
	setvectorpotential_ptx_80 = `
.version 8.5
.target sm_80
.address_size 64

	// .globl	setvectorpotential

.visible .entry setvectorpotential(
	.param .u64 setvectorpotential_param_0,
	.param .u64 setvectorpotential_param_1,
	.param .u64 setvectorpotential_param_2,
	.param .u64 setvectorpotential_param_3,
	.param .u64 setvectorpotential_param_4,
	.param .u64 setvectorpotential_param_5,
	.param .f32 setvectorpotential_param_6,
	.param .u32 setvectorpotential_param_7,
	.param .u32 setvectorpotential_param_8,
	.param .u32 setvectorpotential_param_9,
	.param .u8 setvectorpotential_param_10
)
{
	.reg .pred 	%p<11>;
	.reg .f32 	%f<54>;
	.reg .b32 	%r<48>;
	.reg .b64 	%rd<43>;


	ld.param.u64 	%rd18, [setvectorpotential_param_0];
	ld.param.u64 	%rd19, [setvectorpotential_param_1];
	ld.param.u64 	%rd20, [setvectorpotential_param_2];
	ld.param.u64 	%rd21, [setvectorpotential_param_3];
	ld.param.u64 	%rd22, [setvectorpotential_param_5];
	ld.param.f32 	%f15, [setvectorpotential_param_6];
	ld.param.u32 	%r20, [setvectorpotential_param_7];
	ld.param.u32 	%r21, [setvectorpotential_param_8];
	ld.param.u32 	%r22, [setvectorpotential_param_9];
	cvta.to.global.u64 	%rd1, %rd21;
	cvta.to.global.u64 	%rd2, %rd22;
	mov.u32 	%r23, %ntid.x;
	mov.u32 	%r24, %ctaid.x;
	mul.lo.s32 	%r1, %r24, %r23;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r1, %r2;
	mov.u32 	%r25, %ntid.y;
	mov.u32 	%r26, %ctaid.y;
	mov.u32 	%r27, %tid.y;
	mad.lo.s32 	%r4, %r26, %r25, %r27;
	mov.u32 	%r28, %ntid.z;
	mov.u32 	%r29, %ctaid.z;
	mov.u32 	%r30, %tid.z;
	mad.lo.s32 	%r5, %r29, %r28, %r30;
	setp.ge.s32 	%p1, %r3, %r20;
	setp.ge.s32 	%p2, %r4, %r21;
	or.pred  	%p3, %p1, %p2;
	setp.ge.s32 	%p4, %r5, %r22;
	or.pred  	%p5, %p3, %p4;
	@%p5 bra 	$L__BB0_9;

	mul.lo.s32 	%r6, %r5, %r21;
	setp.lt.s32 	%p6, %r4, 1;
	mov.f32 	%f52, 0f00000000;
	mov.f32 	%f53, %f52;
	@%p6 bra 	$L__BB0_8;

	add.s32 	%r32, %r4, -1;
	and.b32  	%r47, %r4, 3;
	setp.lt.u32 	%p7, %r32, 3;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;
	mov.f32 	%f52, %f53;
	@%p7 bra 	$L__BB0_5;

	sub.s32 	%r45, %r4, %r47;
	add.s32 	%r34, %r6, 1;
	mad.lo.s32 	%r43, %r20, %r34, %r3;
	mul.lo.s32 	%r35, %r21, %r20;
	mad.lo.s32 	%r36, %r35, %r5, %r2;
	add.s32 	%r37, %r36, %r1;
	mul.wide.s32 	%rd23, %r37, 4;
	add.s64 	%rd40, %rd1, %rd23;
	shl.b32 	%r10, %r20, 2;
	mul.wide.s32 	%rd4, %r10, 4;
	add.s64 	%rd39, %rd2, %rd23;
	mul.wide.s32 	%rd6, %r20, 4;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;

$L__BB0_4:
	ld.global.nc.f32 	%f23, [%rd39];
	mul.f32 	%f24, %f23, %f15;
	sub.f32 	%f25, %f53, %f24;
	ld.global.nc.f32 	%f26, [%rd40];
	fma.rn.f32 	%f27, %f26, %f15, %f52;
	mul.wide.s32 	%rd24, %r43, 4;
	add.s64 	%rd25, %rd2, %rd24;
	ld.global.nc.f32 	%f28, [%rd25];
	mul.f32 	%f29, %f28, %f15;
	sub.f32 	%f30, %f25, %f29;
	add.s64 	%rd26, %rd1, %rd24;
	ld.global.nc.f32 	%f31, [%rd26];
	fma.rn.f32 	%f32, %f31, %f15, %f27;
	add.s64 	%rd27, %rd25, %rd6;
	ld.global.nc.f32 	%f33, [%rd27];
	mul.f32 	%f34, %f33, %f15;
	sub.f32 	%f35, %f30, %f34;
	add.s64 	%rd28, %rd26, %rd6;
	ld.global.nc.f32 	%f36, [%rd28];
	fma.rn.f32 	%f37, %f36, %f15, %f32;
	add.s64 	%rd29, %rd27, %rd6;
	ld.global.nc.f32 	%f38, [%rd29];
	mul.f32 	%f39, %f38, %f15;
	sub.f32 	%f53, %f35, %f39;
	add.s64 	%rd30, %rd28, %rd6;
	ld.global.nc.f32 	%f40, [%rd30];
	fma.rn.f32 	%f52, %f40, %f15, %f37;
	add.s32 	%r46, %r46, 4;
	add.s32 	%r43, %r43, %r10;
	add.s64 	%rd40, %rd40, %rd4;
	add.s64 	%rd39, %rd39, %rd4;
	add.s32 	%r45, %r45, -4;
	setp.ne.s32 	%p8, %r45, 0;
	@%p8 bra 	$L__BB0_4;

$L__BB0_5:
	setp.eq.s32 	%p9, %r47, 0;
	@%p9 bra 	$L__BB0_8;

	add.s32 	%r38, %r46, %r6;
	mad.lo.s32 	%r39, %r20, %r38, %r3;
	mul.wide.s32 	%rd31, %r39, 4;
	add.s64 	%rd42, %rd1, %rd31;
	mul.wide.s32 	%rd12, %r20, 4;
	add.s64 	%rd41, %rd2, %rd31;

$L__BB0_7:
	.pragma "nounroll";
	ld.global.nc.f32 	%f41, [%rd41];
	mul.f32 	%f42, %f41, %f15;
	sub.f32 	%f53, %f53, %f42;
	ld.global.nc.f32 	%f43, [%rd42];
	fma.rn.f32 	%f52, %f43, %f15, %f52;
	add.s64 	%rd42, %rd42, %rd12;
	add.s64 	%rd41, %rd41, %rd12;
	add.s32 	%r47, %r47, -1;
	setp.ne.s32 	%p10, %r47, 0;
	@%p10 bra 	$L__BB0_7;

$L__BB0_8:
	add.s32 	%r40, %r6, %r4;
	mad.lo.s32 	%r41, %r40, %r20, %r3;
	cvta.to.global.u64 	%rd32, %rd18;
	mul.wide.s32 	%rd33, %r41, 4;
	add.s64 	%rd34, %rd32, %rd33;
	st.global.f32 	[%rd34], %f53;
	cvta.to.global.u64 	%rd35, %rd19;
	add.s64 	%rd36, %rd35, %rd33;
	mov.u32 	%r42, 0;
	st.global.u32 	[%rd36], %r42;
	cvta.to.global.u64 	%rd37, %rd20;
	add.s64 	%rd38, %rd37, %rd33;
	st.global.f32 	[%rd38], %f52;

$L__BB0_9:
	ret;

}

`
	setvectorpotential_ptx_86 = `
.version 8.5
.target sm_86
.address_size 64

	// .globl	setvectorpotential

.visible .entry setvectorpotential(
	.param .u64 setvectorpotential_param_0,
	.param .u64 setvectorpotential_param_1,
	.param .u64 setvectorpotential_param_2,
	.param .u64 setvectorpotential_param_3,
	.param .u64 setvectorpotential_param_4,
	.param .u64 setvectorpotential_param_5,
	.param .f32 setvectorpotential_param_6,
	.param .u32 setvectorpotential_param_7,
	.param .u32 setvectorpotential_param_8,
	.param .u32 setvectorpotential_param_9,
	.param .u8 setvectorpotential_param_10
)
{
	.reg .pred 	%p<11>;
	.reg .f32 	%f<54>;
	.reg .b32 	%r<48>;
	.reg .b64 	%rd<43>;


	ld.param.u64 	%rd18, [setvectorpotential_param_0];
	ld.param.u64 	%rd19, [setvectorpotential_param_1];
	ld.param.u64 	%rd20, [setvectorpotential_param_2];
	ld.param.u64 	%rd21, [setvectorpotential_param_3];
	ld.param.u64 	%rd22, [setvectorpotential_param_5];
	ld.param.f32 	%f15, [setvectorpotential_param_6];
	ld.param.u32 	%r20, [setvectorpotential_param_7];
	ld.param.u32 	%r21, [setvectorpotential_param_8];
	ld.param.u32 	%r22, [setvectorpotential_param_9];
	cvta.to.global.u64 	%rd1, %rd21;
	cvta.to.global.u64 	%rd2, %rd22;
	mov.u32 	%r23, %ntid.x;
	mov.u32 	%r24, %ctaid.x;
	mul.lo.s32 	%r1, %r24, %r23;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r1, %r2;
	mov.u32 	%r25, %ntid.y;
	mov.u32 	%r26, %ctaid.y;
	mov.u32 	%r27, %tid.y;
	mad.lo.s32 	%r4, %r26, %r25, %r27;
	mov.u32 	%r28, %ntid.z;
	mov.u32 	%r29, %ctaid.z;
	mov.u32 	%r30, %tid.z;
	mad.lo.s32 	%r5, %r29, %r28, %r30;
	setp.ge.s32 	%p1, %r3, %r20;
	setp.ge.s32 	%p2, %r4, %r21;
	or.pred  	%p3, %p1, %p2;
	setp.ge.s32 	%p4, %r5, %r22;
	or.pred  	%p5, %p3, %p4;
	@%p5 bra 	$L__BB0_9;

	mul.lo.s32 	%r6, %r5, %r21;
	setp.lt.s32 	%p6, %r4, 1;
	mov.f32 	%f52, 0f00000000;
	mov.f32 	%f53, %f52;
	@%p6 bra 	$L__BB0_8;

	add.s32 	%r32, %r4, -1;
	and.b32  	%r47, %r4, 3;
	setp.lt.u32 	%p7, %r32, 3;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;
	mov.f32 	%f52, %f53;
	@%p7 bra 	$L__BB0_5;

	sub.s32 	%r45, %r4, %r47;
	add.s32 	%r34, %r6, 1;
	mad.lo.s32 	%r43, %r20, %r34, %r3;
	mul.lo.s32 	%r35, %r21, %r20;
	mad.lo.s32 	%r36, %r35, %r5, %r2;
	add.s32 	%r37, %r36, %r1;
	mul.wide.s32 	%rd23, %r37, 4;
	add.s64 	%rd40, %rd1, %rd23;
	shl.b32 	%r10, %r20, 2;
	mul.wide.s32 	%rd4, %r10, 4;
	add.s64 	%rd39, %rd2, %rd23;
	mul.wide.s32 	%rd6, %r20, 4;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;

$L__BB0_4:
	ld.global.nc.f32 	%f23, [%rd39];
	mul.f32 	%f24, %f23, %f15;
	sub.f32 	%f25, %f53, %f24;
	ld.global.nc.f32 	%f26, [%rd40];
	fma.rn.f32 	%f27, %f26, %f15, %f52;
	mul.wide.s32 	%rd24, %r43, 4;
	add.s64 	%rd25, %rd2, %rd24;
	ld.global.nc.f32 	%f28, [%rd25];
	mul.f32 	%f29, %f28, %f15;
	sub.f32 	%f30, %f25, %f29;
	add.s64 	%rd26, %rd1, %rd24;
	ld.global.nc.f32 	%f31, [%rd26];
	fma.rn.f32 	%f32, %f31, %f15, %f27;
	add.s64 	%rd27, %rd25, %rd6;
	ld.global.nc.f32 	%f33, [%rd27];
	mul.f32 	%f34, %f33, %f15;
	sub.f32 	%f35, %f30, %f34;
	add.s64 	%rd28, %rd26, %rd6;
	ld.global.nc.f32 	%f36, [%rd28];
	fma.rn.f32 	%f37, %f36, %f15, %f32;
	add.s64 	%rd29, %rd27, %rd6;
	ld.global.nc.f32 	%f38, [%rd29];
	mul.f32 	%f39, %f38, %f15;
	sub.f32 	%f53, %f35, %f39;
	add.s64 	%rd30, %rd28, %rd6;
	ld.global.nc.f32 	%f40, [%rd30];
	fma.rn.f32 	%f52, %f40, %f15, %f37;
	add.s32 	%r46, %r46, 4;
	add.s32 	%r43, %r43, %r10;
	add.s64 	%rd40, %rd40, %rd4;
	add.s64 	%rd39, %rd39, %rd4;
	add.s32 	%r45, %r45, -4;
	setp.ne.s32 	%p8, %r45, 0;
	@%p8 bra 	$L__BB0_4;

$L__BB0_5:
	setp.eq.s32 	%p9, %r47, 0;
	@%p9 bra 	$L__BB0_8;

	add.s32 	%r38, %r46, %r6;
	mad.lo.s32 	%r39, %r20, %r38, %r3;
	mul.wide.s32 	%rd31, %r39, 4;
	add.s64 	%rd42, %rd1, %rd31;
	mul.wide.s32 	%rd12, %r20, 4;
	add.s64 	%rd41, %rd2, %rd31;

$L__BB0_7:
	.pragma "nounroll";
	ld.global.nc.f32 	%f41, [%rd41];
	mul.f32 	%f42, %f41, %f15;
	sub.f32 	%f53, %f53, %f42;
	ld.global.nc.f32 	%f43, [%rd42];
	fma.rn.f32 	%f52, %f43, %f15, %f52;
	add.s64 	%rd42, %rd42, %rd12;
	add.s64 	%rd41, %rd41, %rd12;
	add.s32 	%r47, %r47, -1;
	setp.ne.s32 	%p10, %r47, 0;
	@%p10 bra 	$L__BB0_7;

$L__BB0_8:
	add.s32 	%r40, %r6, %r4;
	mad.lo.s32 	%r41, %r40, %r20, %r3;
	cvta.to.global.u64 	%rd32, %rd18;
	mul.wide.s32 	%rd33, %r41, 4;
	add.s64 	%rd34, %rd32, %rd33;
	st.global.f32 	[%rd34], %f53;
	cvta.to.global.u64 	%rd35, %rd19;
	add.s64 	%rd36, %rd35, %rd33;
	mov.u32 	%r42, 0;
	st.global.u32 	[%rd36], %r42;
	cvta.to.global.u64 	%rd37, %rd20;
	add.s64 	%rd38, %rd37, %rd33;
	st.global.f32 	[%rd38], %f52;

$L__BB0_9:
	ret;

}

`
	setvectorpotential_ptx_87 = `
.version 8.5
.target sm_87
.address_size 64

	// .globl	setvectorpotential

.visible .entry setvectorpotential(
	.param .u64 setvectorpotential_param_0,
	.param .u64 setvectorpotential_param_1,
	.param .u64 setvectorpotential_param_2,
	.param .u64 setvectorpotential_param_3,
	.param .u64 setvectorpotential_param_4,
	.param .u64 setvectorpotential_param_5,
	.param .f32 setvectorpotential_param_6,
	.param .u32 setvectorpotential_param_7,
	.param .u32 setvectorpotential_param_8,
	.param .u32 setvectorpotential_param_9,
	.param .u8 setvectorpotential_param_10
)
{
	.reg .pred 	%p<11>;
	.reg .f32 	%f<54>;
	.reg .b32 	%r<48>;
	.reg .b64 	%rd<43>;


	ld.param.u64 	%rd18, [setvectorpotential_param_0];
	ld.param.u64 	%rd19, [setvectorpotential_param_1];
	ld.param.u64 	%rd20, [setvectorpotential_param_2];
	ld.param.u64 	%rd21, [setvectorpotential_param_3];
	ld.param.u64 	%rd22, [setvectorpotential_param_5];
	ld.param.f32 	%f15, [setvectorpotential_param_6];
	ld.param.u32 	%r20, [setvectorpotential_param_7];
	ld.param.u32 	%r21, [setvectorpotential_param_8];
	ld.param.u32 	%r22, [setvectorpotential_param_9];
	cvta.to.global.u64 	%rd1, %rd21;
	cvta.to.global.u64 	%rd2, %rd22;
	mov.u32 	%r23, %ntid.x;
	mov.u32 	%r24, %ctaid.x;
	mul.lo.s32 	%r1, %r24, %r23;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r1, %r2;
	mov.u32 	%r25, %ntid.y;
	mov.u32 	%r26, %ctaid.y;
	mov.u32 	%r27, %tid.y;
	mad.lo.s32 	%r4, %r26, %r25, %r27;
	mov.u32 	%r28, %ntid.z;
	mov.u32 	%r29, %ctaid.z;
	mov.u32 	%r30, %tid.z;
	mad.lo.s32 	%r5, %r29, %r28, %r30;
	setp.ge.s32 	%p1, %r3, %r20;
	setp.ge.s32 	%p2, %r4, %r21;
	or.pred  	%p3, %p1, %p2;
	setp.ge.s32 	%p4, %r5, %r22;
	or.pred  	%p5, %p3, %p4;
	@%p5 bra 	$L__BB0_9;

	mul.lo.s32 	%r6, %r5, %r21;
	setp.lt.s32 	%p6, %r4, 1;
	mov.f32 	%f52, 0f00000000;
	mov.f32 	%f53, %f52;
	@%p6 bra 	$L__BB0_8;

	add.s32 	%r32, %r4, -1;
	and.b32  	%r47, %r4, 3;
	setp.lt.u32 	%p7, %r32, 3;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;
	mov.f32 	%f52, %f53;
	@%p7 bra 	$L__BB0_5;

	sub.s32 	%r45, %r4, %r47;
	add.s32 	%r34, %r6, 1;
	mad.lo.s32 	%r43, %r20, %r34, %r3;
	mul.lo.s32 	%r35, %r21, %r20;
	mad.lo.s32 	%r36, %r35, %r5, %r2;
	add.s32 	%r37, %r36, %r1;
	mul.wide.s32 	%rd23, %r37, 4;
	add.s64 	%rd40, %rd1, %rd23;
	shl.b32 	%r10, %r20, 2;
	mul.wide.s32 	%rd4, %r10, 4;
	add.s64 	%rd39, %rd2, %rd23;
	mul.wide.s32 	%rd6, %r20, 4;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;

$L__BB0_4:
	ld.global.nc.f32 	%f23, [%rd39];
	mul.f32 	%f24, %f23, %f15;
	sub.f32 	%f25, %f53, %f24;
	ld.global.nc.f32 	%f26, [%rd40];
	fma.rn.f32 	%f27, %f26, %f15, %f52;
	mul.wide.s32 	%rd24, %r43, 4;
	add.s64 	%rd25, %rd2, %rd24;
	ld.global.nc.f32 	%f28, [%rd25];
	mul.f32 	%f29, %f28, %f15;
	sub.f32 	%f30, %f25, %f29;
	add.s64 	%rd26, %rd1, %rd24;
	ld.global.nc.f32 	%f31, [%rd26];
	fma.rn.f32 	%f32, %f31, %f15, %f27;
	add.s64 	%rd27, %rd25, %rd6;
	ld.global.nc.f32 	%f33, [%rd27];
	mul.f32 	%f34, %f33, %f15;
	sub.f32 	%f35, %f30, %f34;
	add.s64 	%rd28, %rd26, %rd6;
	ld.global.nc.f32 	%f36, [%rd28];
	fma.rn.f32 	%f37, %f36, %f15, %f32;
	add.s64 	%rd29, %rd27, %rd6;
	ld.global.nc.f32 	%f38, [%rd29];
	mul.f32 	%f39, %f38, %f15;
	sub.f32 	%f53, %f35, %f39;
	add.s64 	%rd30, %rd28, %rd6;
	ld.global.nc.f32 	%f40, [%rd30];
	fma.rn.f32 	%f52, %f40, %f15, %f37;
	add.s32 	%r46, %r46, 4;
	add.s32 	%r43, %r43, %r10;
	add.s64 	%rd40, %rd40, %rd4;
	add.s64 	%rd39, %rd39, %rd4;
	add.s32 	%r45, %r45, -4;
	setp.ne.s32 	%p8, %r45, 0;
	@%p8 bra 	$L__BB0_4;

$L__BB0_5:
	setp.eq.s32 	%p9, %r47, 0;
	@%p9 bra 	$L__BB0_8;

	add.s32 	%r38, %r46, %r6;
	mad.lo.s32 	%r39, %r20, %r38, %r3;
	mul.wide.s32 	%rd31, %r39, 4;
	add.s64 	%rd42, %rd1, %rd31;
	mul.wide.s32 	%rd12, %r20, 4;
	add.s64 	%rd41, %rd2, %rd31;

$L__BB0_7:
	.pragma "nounroll";
	ld.global.nc.f32 	%f41, [%rd41];
	mul.f32 	%f42, %f41, %f15;
	sub.f32 	%f53, %f53, %f42;
	ld.global.nc.f32 	%f43, [%rd42];
	fma.rn.f32 	%f52, %f43, %f15, %f52;
	add.s64 	%rd42, %rd42, %rd12;
	add.s64 	%rd41, %rd41, %rd12;
	add.s32 	%r47, %r47, -1;
	setp.ne.s32 	%p10, %r47, 0;
	@%p10 bra 	$L__BB0_7;

$L__BB0_8:
	add.s32 	%r40, %r6, %r4;
	mad.lo.s32 	%r41, %r40, %r20, %r3;
	cvta.to.global.u64 	%rd32, %rd18;
	mul.wide.s32 	%rd33, %r41, 4;
	add.s64 	%rd34, %rd32, %rd33;
	st.global.f32 	[%rd34], %f53;
	cvta.to.global.u64 	%rd35, %rd19;
	add.s64 	%rd36, %rd35, %rd33;
	mov.u32 	%r42, 0;
	st.global.u32 	[%rd36], %r42;
	cvta.to.global.u64 	%rd37, %rd20;
	add.s64 	%rd38, %rd37, %rd33;
	st.global.f32 	[%rd38], %f52;

$L__BB0_9:
	ret;

}

`
	setvectorpotential_ptx_89 = `
.version 8.5
.target sm_89
.address_size 64

	// .globl	setvectorpotential

.visible .entry setvectorpotential(
	.param .u64 setvectorpotential_param_0,
	.param .u64 setvectorpotential_param_1,
	.param .u64 setvectorpotential_param_2,
	.param .u64 setvectorpotential_param_3,
	.param .u64 setvectorpotential_param_4,
	.param .u64 setvectorpotential_param_5,
	.param .f32 setvectorpotential_param_6,
	.param .u32 setvectorpotential_param_7,
	.param .u32 setvectorpotential_param_8,
	.param .u32 setvectorpotential_param_9,
	.param .u8 setvectorpotential_param_10
)
{
	.reg .pred 	%p<11>;
	.reg .f32 	%f<54>;
	.reg .b32 	%r<48>;
	.reg .b64 	%rd<43>;


	ld.param.u64 	%rd18, [setvectorpotential_param_0];
	ld.param.u64 	%rd19, [setvectorpotential_param_1];
	ld.param.u64 	%rd20, [setvectorpotential_param_2];
	ld.param.u64 	%rd21, [setvectorpotential_param_3];
	ld.param.u64 	%rd22, [setvectorpotential_param_5];
	ld.param.f32 	%f15, [setvectorpotential_param_6];
	ld.param.u32 	%r20, [setvectorpotential_param_7];
	ld.param.u32 	%r21, [setvectorpotential_param_8];
	ld.param.u32 	%r22, [setvectorpotential_param_9];
	cvta.to.global.u64 	%rd1, %rd21;
	cvta.to.global.u64 	%rd2, %rd22;
	mov.u32 	%r23, %ntid.x;
	mov.u32 	%r24, %ctaid.x;
	mul.lo.s32 	%r1, %r24, %r23;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r1, %r2;
	mov.u32 	%r25, %ntid.y;
	mov.u32 	%r26, %ctaid.y;
	mov.u32 	%r27, %tid.y;
	mad.lo.s32 	%r4, %r26, %r25, %r27;
	mov.u32 	%r28, %ntid.z;
	mov.u32 	%r29, %ctaid.z;
	mov.u32 	%r30, %tid.z;
	mad.lo.s32 	%r5, %r29, %r28, %r30;
	setp.ge.s32 	%p1, %r3, %r20;
	setp.ge.s32 	%p2, %r4, %r21;
	or.pred  	%p3, %p1, %p2;
	setp.ge.s32 	%p4, %r5, %r22;
	or.pred  	%p5, %p3, %p4;
	@%p5 bra 	$L__BB0_9;

	mul.lo.s32 	%r6, %r5, %r21;
	setp.lt.s32 	%p6, %r4, 1;
	mov.f32 	%f52, 0f00000000;
	mov.f32 	%f53, %f52;
	@%p6 bra 	$L__BB0_8;

	add.s32 	%r32, %r4, -1;
	and.b32  	%r47, %r4, 3;
	setp.lt.u32 	%p7, %r32, 3;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;
	mov.f32 	%f52, %f53;
	@%p7 bra 	$L__BB0_5;

	sub.s32 	%r45, %r4, %r47;
	add.s32 	%r34, %r6, 1;
	mad.lo.s32 	%r43, %r20, %r34, %r3;
	mul.lo.s32 	%r35, %r21, %r20;
	mad.lo.s32 	%r36, %r35, %r5, %r2;
	add.s32 	%r37, %r36, %r1;
	mul.wide.s32 	%rd23, %r37, 4;
	add.s64 	%rd40, %rd1, %rd23;
	shl.b32 	%r10, %r20, 2;
	mul.wide.s32 	%rd4, %r10, 4;
	add.s64 	%rd39, %rd2, %rd23;
	mul.wide.s32 	%rd6, %r20, 4;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;

$L__BB0_4:
	ld.global.nc.f32 	%f23, [%rd39];
	mul.f32 	%f24, %f23, %f15;
	sub.f32 	%f25, %f53, %f24;
	ld.global.nc.f32 	%f26, [%rd40];
	fma.rn.f32 	%f27, %f26, %f15, %f52;
	mul.wide.s32 	%rd24, %r43, 4;
	add.s64 	%rd25, %rd2, %rd24;
	ld.global.nc.f32 	%f28, [%rd25];
	mul.f32 	%f29, %f28, %f15;
	sub.f32 	%f30, %f25, %f29;
	add.s64 	%rd26, %rd1, %rd24;
	ld.global.nc.f32 	%f31, [%rd26];
	fma.rn.f32 	%f32, %f31, %f15, %f27;
	add.s64 	%rd27, %rd25, %rd6;
	ld.global.nc.f32 	%f33, [%rd27];
	mul.f32 	%f34, %f33, %f15;
	sub.f32 	%f35, %f30, %f34;
	add.s64 	%rd28, %rd26, %rd6;
	ld.global.nc.f32 	%f36, [%rd28];
	fma.rn.f32 	%f37, %f36, %f15, %f32;
	add.s64 	%rd29, %rd27, %rd6;
	ld.global.nc.f32 	%f38, [%rd29];
	mul.f32 	%f39, %f38, %f15;
	sub.f32 	%f53, %f35, %f39;
	add.s64 	%rd30, %rd28, %rd6;
	ld.global.nc.f32 	%f40, [%rd30];
	fma.rn.f32 	%f52, %f40, %f15, %f37;
	add.s32 	%r46, %r46, 4;
	add.s32 	%r43, %r43, %r10;
	add.s64 	%rd40, %rd40, %rd4;
	add.s64 	%rd39, %rd39, %rd4;
	add.s32 	%r45, %r45, -4;
	setp.ne.s32 	%p8, %r45, 0;
	@%p8 bra 	$L__BB0_4;

$L__BB0_5:
	setp.eq.s32 	%p9, %r47, 0;
	@%p9 bra 	$L__BB0_8;

	add.s32 	%r38, %r46, %r6;
	mad.lo.s32 	%r39, %r20, %r38, %r3;
	mul.wide.s32 	%rd31, %r39, 4;
	add.s64 	%rd42, %rd1, %rd31;
	mul.wide.s32 	%rd12, %r20, 4;
	add.s64 	%rd41, %rd2, %rd31;

$L__BB0_7:
	.pragma "nounroll";
	ld.global.nc.f32 	%f41, [%rd41];
	mul.f32 	%f42, %f41, %f15;
	sub.f32 	%f53, %f53, %f42;
	ld.global.nc.f32 	%f43, [%rd42];
	fma.rn.f32 	%f52, %f43, %f15, %f52;
	add.s64 	%rd42, %rd42, %rd12;
	add.s64 	%rd41, %rd41, %rd12;
	add.s32 	%r47, %r47, -1;
	setp.ne.s32 	%p10, %r47, 0;
	@%p10 bra 	$L__BB0_7;

$L__BB0_8:
	add.s32 	%r40, %r6, %r4;
	mad.lo.s32 	%r41, %r40, %r20, %r3;
	cvta.to.global.u64 	%rd32, %rd18;
	mul.wide.s32 	%rd33, %r41, 4;
	add.s64 	%rd34, %rd32, %rd33;
	st.global.f32 	[%rd34], %f53;
	cvta.to.global.u64 	%rd35, %rd19;
	add.s64 	%rd36, %rd35, %rd33;
	mov.u32 	%r42, 0;
	st.global.u32 	[%rd36], %r42;
	cvta.to.global.u64 	%rd37, %rd20;
	add.s64 	%rd38, %rd37, %rd33;
	st.global.f32 	[%rd38], %f52;

$L__BB0_9:
	ret;

}

`
	setvectorpotential_ptx_90 = `
.version 8.5
.target sm_90
.address_size 64

	// .globl	setvectorpotential

.visible .entry setvectorpotential(
	.param .u64 setvectorpotential_param_0,
	.param .u64 setvectorpotential_param_1,
	.param .u64 setvectorpotential_param_2,
	.param .u64 setvectorpotential_param_3,
	.param .u64 setvectorpotential_param_4,
	.param .u64 setvectorpotential_param_5,
	.param .f32 setvectorpotential_param_6,
	.param .u32 setvectorpotential_param_7,
	.param .u32 setvectorpotential_param_8,
	.param .u32 setvectorpotential_param_9,
	.param .u8 setvectorpotential_param_10
)
{
	.reg .pred 	%p<11>;
	.reg .f32 	%f<54>;
	.reg .b32 	%r<48>;
	.reg .b64 	%rd<43>;


	ld.param.u64 	%rd18, [setvectorpotential_param_0];
	ld.param.u64 	%rd19, [setvectorpotential_param_1];
	ld.param.u64 	%rd20, [setvectorpotential_param_2];
	ld.param.u64 	%rd21, [setvectorpotential_param_3];
	ld.param.u64 	%rd22, [setvectorpotential_param_5];
	ld.param.f32 	%f15, [setvectorpotential_param_6];
	ld.param.u32 	%r20, [setvectorpotential_param_7];
	ld.param.u32 	%r21, [setvectorpotential_param_8];
	ld.param.u32 	%r22, [setvectorpotential_param_9];
	cvta.to.global.u64 	%rd1, %rd21;
	cvta.to.global.u64 	%rd2, %rd22;
	mov.u32 	%r23, %ntid.x;
	mov.u32 	%r24, %ctaid.x;
	mul.lo.s32 	%r1, %r24, %r23;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r1, %r2;
	mov.u32 	%r25, %ntid.y;
	mov.u32 	%r26, %ctaid.y;
	mov.u32 	%r27, %tid.y;
	mad.lo.s32 	%r4, %r26, %r25, %r27;
	mov.u32 	%r28, %ntid.z;
	mov.u32 	%r29, %ctaid.z;
	mov.u32 	%r30, %tid.z;
	mad.lo.s32 	%r5, %r29, %r28, %r30;
	setp.ge.s32 	%p1, %r3, %r20;
	setp.ge.s32 	%p2, %r4, %r21;
	or.pred  	%p3, %p1, %p2;
	setp.ge.s32 	%p4, %r5, %r22;
	or.pred  	%p5, %p3, %p4;
	@%p5 bra 	$L__BB0_9;

	mul.lo.s32 	%r6, %r5, %r21;
	setp.lt.s32 	%p6, %r4, 1;
	mov.f32 	%f52, 0f00000000;
	mov.f32 	%f53, %f52;
	@%p6 bra 	$L__BB0_8;

	add.s32 	%r32, %r4, -1;
	and.b32  	%r47, %r4, 3;
	setp.lt.u32 	%p7, %r32, 3;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;
	mov.f32 	%f52, %f53;
	@%p7 bra 	$L__BB0_5;

	sub.s32 	%r45, %r4, %r47;
	add.s32 	%r34, %r6, 1;
	mad.lo.s32 	%r43, %r20, %r34, %r3;
	mul.lo.s32 	%r35, %r21, %r20;
	mad.lo.s32 	%r36, %r35, %r5, %r2;
	add.s32 	%r37, %r36, %r1;
	mul.wide.s32 	%rd23, %r37, 4;
	add.s64 	%rd40, %rd1, %rd23;
	shl.b32 	%r10, %r20, 2;
	mul.wide.s32 	%rd4, %r10, 4;
	add.s64 	%rd39, %rd2, %rd23;
	mul.wide.s32 	%rd6, %r20, 4;
	mov.f32 	%f53, 0f00000000;
	mov.u32 	%r46, 0;

$L__BB0_4:
	ld.global.nc.f32 	%f23, [%rd39];
	mul.f32 	%f24, %f23, %f15;
	sub.f32 	%f25, %f53, %f24;
	ld.global.nc.f32 	%f26, [%rd40];
	fma.rn.f32 	%f27, %f26, %f15, %f52;
	mul.wide.s32 	%rd24, %r43, 4;
	add.s64 	%rd25, %rd2, %rd24;
	ld.global.nc.f32 	%f28, [%rd25];
	mul.f32 	%f29, %f28, %f15;
	sub.f32 	%f30, %f25, %f29;
	add.s64 	%rd26, %rd1, %rd24;
	ld.global.nc.f32 	%f31, [%rd26];
	fma.rn.f32 	%f32, %f31, %f15, %f27;
	add.s64 	%rd27, %rd25, %rd6;
	ld.global.nc.f32 	%f33, [%rd27];
	mul.f32 	%f34, %f33, %f15;
	sub.f32 	%f35, %f30, %f34;
	add.s64 	%rd28, %rd26, %rd6;
	ld.global.nc.f32 	%f36, [%rd28];
	fma.rn.f32 	%f37, %f36, %f15, %f32;
	add.s64 	%rd29, %rd27, %rd6;
	ld.global.nc.f32 	%f38, [%rd29];
	mul.f32 	%f39, %f38, %f15;
	sub.f32 	%f53, %f35, %f39;
	add.s64 	%rd30, %rd28, %rd6;
	ld.global.nc.f32 	%f40, [%rd30];
	fma.rn.f32 	%f52, %f40, %f15, %f37;
	add.s32 	%r46, %r46, 4;
	add.s32 	%r43, %r43, %r10;
	add.s64 	%rd40, %rd40, %rd4;
	add.s64 	%rd39, %rd39, %rd4;
	add.s32 	%r45, %r45, -4;
	setp.ne.s32 	%p8, %r45, 0;
	@%p8 bra 	$L__BB0_4;

$L__BB0_5:
	setp.eq.s32 	%p9, %r47, 0;
	@%p9 bra 	$L__BB0_8;

	add.s32 	%r38, %r46, %r6;
	mad.lo.s32 	%r39, %r20, %r38, %r3;
	mul.wide.s32 	%rd31, %r39, 4;
	add.s64 	%rd42, %rd1, %rd31;
	mul.wide.s32 	%rd12, %r20, 4;
	add.s64 	%rd41, %rd2, %rd31;

$L__BB0_7:
	.pragma "nounroll";
	ld.global.nc.f32 	%f41, [%rd41];
	mul.f32 	%f42, %f41, %f15;
	sub.f32 	%f53, %f53, %f42;
	ld.global.nc.f32 	%f43, [%rd42];
	fma.rn.f32 	%f52, %f43, %f15, %f52;
	add.s64 	%rd42, %rd42, %rd12;
	add.s64 	%rd41, %rd41, %rd12;
	add.s32 	%r47, %r47, -1;
	setp.ne.s32 	%p10, %r47, 0;
	@%p10 bra 	$L__BB0_7;

$L__BB0_8:
	add.s32 	%r40, %r6, %r4;
	mad.lo.s32 	%r41, %r40, %r20, %r3;
	cvta.to.global.u64 	%rd32, %rd18;
	mul.wide.s32 	%rd33, %r41, 4;
	add.s64 	%rd34, %rd32, %rd33;
	st.global.f32 	[%rd34], %f53;
	cvta.to.global.u64 	%rd35, %rd19;
	add.s64 	%rd36, %rd35, %rd33;
	mov.u32 	%r42, 0;
	st.global.u32 	[%rd36], %r42;
	cvta.to.global.u64 	%rd37, %rd20;
	add.s64 	%rd38, %rd37, %rd33;
	st.global.f32 	[%rd38], %f52;

$L__BB0_9:
	ret;

}

`
)
